Abstract:
A photodetector is formed in a semiconductor body. A hard mask grating is photolithographically formed on a surface of the semiconductor body. The semiconductor body is etched using the hard mask grating as a mask. The etching is performed down to a predetermined depth. An implantation is performed such that an anode or cathode of the photodector that has been interrupted during the etching is re-formed.
Abstract:
A damage control system for monitoring, suppressing and eliminating leakage damage, fire damage and/or ABC contamination after collisions, running aground, the effects of weapons, etc., has an automation and monitoring system for system failures, voltage outages and equipment failures and has an operating station at which a perspective layout of the ship, which represents the rooms of the ship, can be displayed.To obtain a picture of the situation more rapidly after a collision, running aground or the effects of weapons, an alarm unit is installed in each room or in each of a group of rooms of the ship allocated together, these alarms cooperating with the damage control system, so that when deployed, the display of the corresponding room and/or group of rooms allocated together undergoes a color change in the perspective layout of the ship.
Abstract:
An electrically heated composite glass sheet including heating element wires deposited and fixed in place on the thermoplastic film connecting the individual glass sheets together so as to extend from the one film edge as far as the opposite film edge. The heating wires are connected in parallel with buses, which are arranged at a predetermined distance from the edge of the film. Directly adjacent to the buses, the sections of the wires which are arranged between the buses and the edge of the film are severed by moving two electrodes, which are connected with a power supply, into contact with the wires. The electric current heats the wires between the electrodes to their fusion temperature and thereby severs the wires.
Abstract:
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer disposed beneath a top portion thereof. A trench is disposed in the workpiece extending at least through the buried layer. At least one sinker contact is disposed in the top portion of the workpiece. The at least one sinker contact is proximate sidewalls of at least a portion of the trench and is adjacent the buried layer. An insulating material is disposed on the sidewalls of the trench. A conductive material is disposed within the trench and is coupled to a lower portion of the workpiece.
Abstract:
A cordless telephone system consisting of a fixed station and at least one mobile station, both of which switch over to standby operation after a telephone conversation has been terminated, and correspond with one another at fixed intervals. Each mobile station is registered in the fixed station and can be addressed by the fixed station, and both the fixed and the mobile station each have a receiver circuit and a transmission circuit. The transmission power of the transmission amplifier can be set, at least in the fixed station, as a function of the number of connected mobile stations.
Abstract:
A system for dividing a workspace includes a wall designed to divide the workspace into a workspace and an area outside of the workspace. The wall includes a variety of features such as a slit extending horizontally across at least a portion of the wall at a level designed to provide individuals seated within the interior workspace with a constant view of the area outside of the workspace at both an immediate periphery of the wall as well as areas at a distance from the wall. Furthermore, the slit includes dimensions configured to provide individuals located in the area outside of the workspace with a view into the interior workspace when at a distance from the wall and restrict individuals located in the area outside of the workspace from views into the interior workspace when in close proximity to the wall. Also, the wall may include other feature such as a visual shield extending thereabove and a lining formed by a composite construction element.
Abstract:
An arrangement or apparatus for exposing semiconductor wafers by means of a synchrotron radiation, wherein a mask and semiconductor wafer are movable in a common, perpendicular direction relative to the direction of the X-ray beam in order to sweep an exposure field. The optical devices are provided for observing adjustment marks on the mask and semiconductor wafer to create control signals for the adjustment of the mask and wafer relative to each other. The beam radiation is conducted in a tube having a rectangular slot-shaped radiation window, which is arranged immediately adjacent to the mask and the optical devices are provided next to the beam feed tube and aligned to a part of the exposure fields lying outside of the impingement area of the beam leaving the radiation window.
Abstract:
Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.
Abstract:
Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.
Abstract:
For the integration of an npn bipolar transistor with a hetero bipolar transistor, a placeholder layer is generated in a base region of the hetero bipolar transistor after structuring a collector structure for both types of transistors, wherein the placeholder layer is not present in a base region of the bipolar transistor. After generating the base of the bipolar transistor, the base of the bipolar transistor is covered, whereupon the placeholder layer is removed and the base of the hetero bipolar transistor is generated in the places where the placeholder layer has been removed. The emitter structure is again generated equally for both types of transistors so that an integrated circuit results which includes bipolar transistors and hetero bipolar transistors whose collector structures and/or whose emitter structures consist of identical production layers. Thus, space-saving and cost-effective integrated circuits may be produced benefiting from the advantages of both types of transistors.