公开(公告)号：US4631419A

公开(公告)日：1986-12-23

申请号：US565177

申请日：1983-12-23

申请人： Hiroshi Sadamatsu ,  Yoshio Wada ,  Hideaki Ito

发明人： Hiroshi Sadamatsu ,  Yoshio Wada ,  Hideaki Ito

IPC分类号： G11B5/027 ,  H03K17/10 ,  H03K17/60 ,  H03K17/62 ,  H03K3/26

CPC分类号： H03K17/60 ,  H03K17/10 ,  H03K17/62

摘要： A switch circuit is comprised of first and second NPN transistors, the collectors of which are interconnected and the emitters of which are respectively connected to an input terminal and a reference voltage, third and fourth PNP transistors connected between the bases of said first and second transistors and a power source voltage, and fifth and sixth NPN transistors connected between the bases of the third and fourth transistors and ground. Seventh and eighth PNP transistors, connected between the power source and ground, are further provided, with their ON and OFF states being controlled by a control signal applied to the bases thereof. The bases of the fifth and sixth transistors are respectively connected to the collectors of the seventh and eighth transistors. The fifth and sixth transistors are ON/OFF controlled by the collector currents of the seventh and eighth transistors, respectively.

摘要翻译： 开关电路包括第一和第二NPN晶体管，其集电极互连，其发射极分别连接到输入端子和参考电压，第三和第四PNP晶体管连接在所述第一和第二晶体管的基极之间 和电源电压，以及连接在第三和第四晶体管的基极之间并接地的第五和第六NPN晶体管。 连接在电源和地之间的第七和第八PNP晶体管被进一步提供，其ON和OFF状态由施加到其基极的控制信号控制。 第五和第六晶体管的基极分别连接到第七和第八晶体管的集电极。 第五和第六晶体管分别由第七和第八晶体管的集电极电流控制开/关。

公开(公告)号：US09241266B2

公开(公告)日：2016-01-19

申请号：US13129896

申请日：2009-11-20

申请人： Katsuhisa Nakamura ,  Yoshio Wada ,  Koki Hayashi ,  Yuichiro Kameoka

发明人： Katsuhisa Nakamura ,  Yoshio Wada ,  Koki Hayashi ,  Yuichiro Kameoka

IPC分类号： H04W12/06 ,  H04W84/04

CPC分类号： H04W12/06 ,  H04L61/2514 ,  H04L63/101 ,  H04W84/045

摘要： The present invention relates to an authentication system, a small base station, and an authentication method which allow a server side to authenticate whether an installation position of a small base station is valid or not. In a packet to be sent as an authentication request from the femto base station 1, in-IC card information of an IC card inserted into the femto base station 1 is contained. A network terminating device 2 converts a local IP address described in a header of the packet to a global IP address, and sends it to a femto concentrator 4. The femto concentrator 4 generates authentication information by associating the in-IC card information with the global IP address, and sends it to an authentication server 5. The authentication server 5 determines that the installation position of the femto base station 1 is valid if the in-IC card information and global IP address included in the authentication information have been associated with each other and registered in an authentication table. The present invention can be applied to a base station for a femtocell.

摘要翻译： 本发明涉及允许服务器端认证小型基站的安装位置是否有效的认证系统，小型基站和认证方法。 在作为来自毫微微基站1的认证请求发送的分组中，包含插入到毫微微基站1的IC卡的IC卡内信息。 网络终端设备2将分组报头中描述的本地IP地址转换为全局IP地址，并将其发送到毫微微集中器4.毫微微集中器4通过将IC卡内信息与全局IP卡信息相关联来生成认证信息 IP地址，并将其发送给认证服务器5.认证服务器5确定毫微微基站1的安装位置是否有效，如果包含在认证信息中的IC卡内信息和全局IP地址已经与每个 其他并注册在认证表中。 本发明可以应用于毫微微小区的基站。

公开(公告)号：US20090207990A1

公开(公告)日：2009-08-20

申请号：US12358787

申请日：2009-01-23

申请人： Yoshio Wada

发明人： Yoshio Wada

IPC分类号： H04M3/42

CPC分类号： H04M3/436 ,  H04M3/42102 ,  H04M3/42153 ,  H04M3/42238 ,  H04M3/42365

摘要： The present invention provides a telephone communication control apparatus that ensures a user to be reached by a person who is calling the user without requiring the user to open a number, which identifies the user, to the party.A telephone communication control apparatus including:a registry in which at least status information that indicates status of each of a plurality of members is registered, wherein the plurality of members share a fixed telephone terminal and respectively have communication terminals;an authentication unit that authenticates a calling subscriber number of a call based on calling subscriber information in which calling subscriber numbers approved to have a session with the members are indicated when the call is made to the number of the fixed telephone terminal; anda transfer control unit that transfers the call that is authenticated at the authentication unit to a communication terminal based on the information in the registry.

摘要翻译： 本发明提供了一种电话通信控制装置，其确保用户在呼叫用户的情况下到达用户，而不需要用户向该方打开标识用户的号码。 一种电话通信控制装置，包括：注册表，其中至少指示多个成员中的每一个的状态的状态信息被注册，其中所述多个成员共享固定电话终端并分别具有通信终端; 认证单元，用于基于主叫用户信息认证呼叫用户号码，其中当呼叫所述固定电话终端的号码时，指示被批准与会员进行会话的主叫用户号码; 以及传送控制单元，其基于注册表中的信息将在认证单元处认证的呼叫转移到通信终端。

公开(公告)号：US20070162533A1

公开(公告)日：2007-07-12

申请号：US11641864

申请日：2006-12-20

申请人： Yoshio Wada

发明人： Yoshio Wada

IPC分类号： G06F17/14

CPC分类号： G06F17/142

摘要： A circuit for a fast Fourier transform (FFT) operation is provided. The FFT operation circuit includes a plurality of butterfly operation units connected in series. Each of the plurality of butterfly operation units reads a signal in the order in which the plurality of butterfly operation units perform complex multiplication, addition, and subtraction, performs complex multiplication of each sequentially read signal by a complex coefficient corresponding to an FFT length and the stage number of the butterfly operation unit, and performs complex addition and subtraction with the complex multiplied signal. In this way, without disposing a plurality of operation circuits corresponding to a radix, FFT operations corresponding to a plurality of FFT lengths can be performed.

摘要翻译： 提供了一种用于快速傅立叶变换（FFT）操作的电路。 FFT运算电路包括串联连接的多个蝶形运算单元。 多个蝶形运算单元中的每一个按照多个蝶形运算单元执行复数乘法，相加和减法的顺序读取信号，执行每个顺序读取信号的复数乘以与FFT长度对应的复数系数，并且 蝶形运算单元的级数，并用复数乘法信号进行复加减运算。 以这种方式，在不设置与基数相对应的多个运算电路的情况下，可以执行与多个FFT长度对应的FFT运算。

公开(公告)号：US5602879A

公开(公告)日：1997-02-11

申请号：US256841

申请日：1994-07-26

申请人： Yoshio Wada

发明人： Yoshio Wada

IPC分类号： H03J7/02 ,  H04L1/20 ,  H04L7/02 ,  H04L27/00 ,  H04L27/22 ,  H04L27/233 ,  H04L7/00

CPC分类号： H04L7/0054 ,  H04L27/2332 ,  H04L2027/0032 ,  H04L2027/0055 ,  H04L2027/0057

摘要： A clock recovering circuit including a correlation detection circuit for sampling a signal of a plurality of sampling points fixed in advance for each unit data cycle and detecting correlations between each adjacent pair of the sampling points, a correlation judgment circuit for comparing the correlations detected by the correlation detection circuit, judging the pair of sampling points which maximize the correlation and another pair of sampling points providing the next largest correlation and producing a timing clock signal based on the sampling point which is a common sampling point with respect to the two pairs of sampling points providing the largest and the next largest correlation, and a phase shift circuit for shifting the phase of the signal so as to equalize the correlations of the two pairs of sampling points so that the timing clock signal which is produced by the common sampling points is always generated at a point at which an eye pattern of the signal opens most widely.

摘要翻译： PCT No.PCT / JP94 / 00370 Sec。 371日期：1994年7月26日 102（e）日期1994年7月26日PCT 1994年3月9日PCT公布。 公开号WO94 / 21073 日期1994年9月3日一种时钟恢复电路，包括相关检测电路，用于对每个单位数据周期预先固定的多个采样点的信号进行采样，并检测每个相邻的采样点对之间的相关性;相关判断电路，用于比较 由相关检测电路检测的相关性，判断使相关性最大化的采样点对和提供下一个最大相关性的另一对采样点，并且基于采样点产生定时时钟信号，该采样点是相对于 提供最大和下一个最大相关的两对采样点，以及用于移位信号的相位的相移电路，以便均衡两对采样点的相关性，使得定时时钟信号由 公共采样点总是在信号op的眼图的某一点产生 最广泛。

公开(公告)号：US5079443A

公开(公告)日：1992-01-07

申请号：US586987

申请日：1990-09-24

申请人： Yoshio Wada ,  Katsuji Fujita

发明人： Yoshio Wada ,  Katsuji Fujita

IPC分类号： H03K3/0233 ,  H03K3/288 ,  H03K5/08

CPC分类号： H03K3/02337 ,  H03K3/288

摘要： Since the resistor is inserted between each of the emitters of the transistors to which the comparison voltage is applied and each of the collectors of the differential pair of transistors, a positive feedback is applied at different points where a differential input voltage is increased from the negative and it is decreased from the positive, and thus the voltage comparator circuit has the hysteresis characteristics. It is therefore possible to reliably have the hysteresis characteristics of a narrow range of voltage of 100 mV or less (for example, several tens of millivolts) without increasing the number of elements in use or depending upon the value of k.multidot.T/q (k is the Boltzmann's constant, T is an absolute temperature, and q is an amount of charge of electrons).

摘要翻译： 由于电阻器插入到施加了比较电压的晶体管的每个发射极和差分晶体管对的每个集电极之间，所以在差分输入电压从负极增加的不同点处施加正反馈 并且从正向减小，因此电压比较器电路具有滞后特性。 因此，可以在不增加使用中的元件数量的情况下或根据kxT / q的值（k是（k））来可靠地具有100mV以下的窄电压范围的滞后特性（例如数十毫伏） 玻尔兹曼常数T是绝对温度，q是电子的电荷量）。

公开(公告)号：US4032799A

公开(公告)日：1977-06-28

申请号：US663155

申请日：1976-03-02

申请人： Takashi Sugimoto ,  Yoshio Wada

发明人： Takashi Sugimoto ,  Yoshio Wada

IPC分类号： H03G3/10 ,  H03G1/00 ,  H03G3/30 ,  H03K1/14

CPC分类号： H03G1/0005 ,  H03G3/3005

摘要： An automatic gain control circuit includes a first transistor whose base is supplied with an input signal and whose collector is impressed with a first source voltage through a first resistor and a second transistor whose collector is connected to the emitter of the first transistor, whose emitter is grounded and whose base is impressed with an automatic gain control voltage. The collector of the first transistor serves as an output terminal of the automatic gain control circuit. The automatic gain control circuit further includes a third transistor whose base is connected to the base of the second transistor and whose emitter is grounded and a fourth transistor whose emitter is connected to the collector of the third transistor, whose collector is connected to the base of the first transistor through a second resistor and is impressed with a second source voltage through a third resistor and whose base is connected to said collector through a fourth resistor.

公开(公告)号：US10714888B2

公开(公告)日：2020-07-14

申请号：US16292381

申请日：2019-03-05

申请人： Toshiyuki Ikeoh ,  Yasuhiro Higashi ,  Yoshio Wada ,  Takumi Satoh ,  Hiroaki Minamide ,  Kouji Nawata ,  Yuma Takida

发明人： Toshiyuki Ikeoh ,  Yasuhiro Higashi ,  Yoshio Wada ,  Takumi Satoh ,  Hiroaki Minamide ,  Kouji Nawata ,  Yuma Takida

IPC分类号： H01S3/16 ,  H01S3/11 ,  G02F1/355 ,  H01S3/00

摘要： A pulsed electromagnetic-wave generator includes an excitation light source, a laser resonator, a pulse generating unit, and a wavelength converting unit. Excitation light from the excitation light source enters the laser resonator. The pulse generating unit is configured to generate a pulsed light group including at least two or more pulses with different frequencies (ω) and different oscillation timings (t) in one excitation process of the excitation light source, an oscillation frequency difference (Δω) between the pulses in the pulsed light group being an integral multiple of a Free Spectral Range (FSR) of the laser resonator. The pulsed light group enters the wavelength converting unit. The wavelength converting unit is configured to generate a pulsed electromagnetic wave in which a wavelength of each pulse in the pulsed light group is converted.

公开(公告)号：US20120002649A1

公开(公告)日：2012-01-05

申请号：US13124680

申请日：2009-12-24

申请人： Osamu Kurokawa ,  Yuki Nakanishi ,  Yoshio Wada

发明人： Osamu Kurokawa ,  Yuki Nakanishi ,  Yoshio Wada

IPC分类号： H04W28/00 ,  H04L12/66 ,  H04W92/00

CPC分类号： H04L41/0806 ,  H04L29/12066 ,  H04L61/1511 ,  H04L63/164 ,  H04W8/26 ,  H04W12/02 ,  H04W76/12 ,  H04W76/16 ,  H04W84/045 ,  H04W88/04 ,  H04W88/08

摘要： A femto-cell base station acquires an IP address of a CS-dedicated relay device from a first management device, connects to the CS-dedicated relay device based on the acquired IP address of the CS-dedicated relay device, and establishes a first IPsec Tunnel between the femto-cell base station and the CS-dedicated relay device. The femto-cell base station also acquires an IP address of a PS-dedicated relay device from a second management device through the first IPsec Tunnel, connects to the PS-dedicated relay device based on the acquired IP address of the PS-dedicated relay device, and establishes a second IPsec Tunnel between the femto-cell base station and the PS-dedicated relay device.

摘要翻译： 毫微微小区基站从第一管理装置获取CS专用中继装置的IP地址，基于所获取的CS专用中继装置的IP地址与CS专用中继装置连接，建立第一IPsec 毫微微小区基站和CS专用中继设备之间的隧道。 毫微微小区基站还通过第一IPsec隧道从第二管理设备获取PS专用中继设备的IP地址，并根据获取的PS专用中继设备的IP地址连接到PS专用中继设备 并且在毫微微小区基站和PS专用中继设备之间建立第二IPsec隧道。

公开(公告)号：US07979485B2

公开(公告)日：2011-07-12

申请号：US11641864

申请日：2006-12-20

申请人： Yoshio Wada

发明人： Yoshio Wada

IPC分类号： G06F17/14

CPC分类号： G06F17/142

摘要： A circuit for a fast Fourier transform (FFT) operation is provided. The FFT operation circuit includes a plurality of butterfly operation units connected in series. Each of the plurality of butterfly operation units reads a signal in the order in which the plurality of butterfly operation units perform complex multiplication, addition, and subtraction, performs complex multiplication of each sequentially read signal by a complex coefficient corresponding to an FFT length and the stage number of the butterfly operation unit, and performs complex addition and subtraction with the complex multiplied signal. In this way, without disposing a plurality of operation circuits corresponding to a radix, FFT operations corresponding to a plurality of FFT lengths can be performed.

摘要翻译： 提供了一种用于快速傅立叶变换（FFT）操作的电路。 FFT运算电路包括串联连接的多个蝶形运算单元。 多个蝶形运算单元中的每一个按照多个蝶形运算单元执行复数乘法，相加和减法的顺序读取信号，执行每个顺序读取信号的复数乘以与FFT长度对应的复数系数，并且 蝶形运算单元的级数，并用复数乘法信号进行复加减运算。 以这种方式，在不设置与基数相对应的多个运算电路的情况下，可以执行与多个FFT长度对应的FFT运算。