公开(公告)号：US20130314390A1

公开(公告)日：2013-11-28

申请号：US13983411

申请日：2012-07-25

申请人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G09G3/36

CPC分类号： G09G3/36 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/0213 ,  G09G2310/0218 ,  G09G2310/0297 ,  G09G2320/0219 ,  G09G2330/023

摘要： There is provided an SSD display device with reduced power consumption.A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film. transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

摘要翻译： 提供了具有降低的功耗的SSD显示设备。 选择电路（400）由k个选择块（410（1）至410（k））组成。 每个选择块由三个薄膜组成。 晶体管。 三个薄膜晶体管分别具有提供给它们的栅极端子的选择控制信号（CT）的三相。 提供扫描期间（T1），并且后跟空闲期间（T2）。 在空闲时段（T2）中，根据空闲周期频率（fck2）的选择控制信号（CT），使每个选择块中的三个薄膜晶体管成为导通状态。 空闲周期频率（fck2）低于扫描周期频率（fck1）。

公开(公告)号：US09261746B2

公开(公告)日：2016-02-16

申请号：US14234450

申请日：2012-08-03

申请人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1333

CPC分类号： G02F1/136213 ,  G02F1/1333 ,  G02F1/136227

摘要： In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.

摘要翻译： 为了抑制像素电极和源极线之间的串扰以减少闪烁，LCD器件包括：栅极线102和栅极线105，其设置为栅格图案; 像素电极111，其以矩阵图案排列，以对应于栅极线和源极线的交点; 透明辅助电容电极109; 以及开关元件121，被配置为根据从栅极线102施加的扫描信号将从源极线105提供的图像信号电压施加到像素电极111.开关元件121通过使用氧化物半导体层104形成，并且 透明辅助电容电极109设置在源极线105和像素电极111之间。

公开(公告)号：US09336736B2

公开(公告)日：2016-05-10

申请号：US14235125

申请日：2012-07-25

申请人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G09G3/36 ,  G11C19/28 ,  G02F1/1362

CPC分类号： G09G3/3677 ,  G02F1/136213 ,  G09G3/3614 ,  G09G3/3655 ,  G09G2300/0876 ,  G09G2330/023 ,  G11C19/28

摘要： Provided is a liquid crystal display device with reduced power consumption employing a CS drive method.A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).

摘要翻译： 提供了采用CS驱动方法降低功耗的液晶显示装置。 CS驱动器（500）由CS移位寄存器（510）和CS输出部分（520）组成。 CS移位寄存器（510）根据CS时钟信号CCK输出控制信号（COUT（1）至COUT（m））。 CS输出部分（520）分别根据控制信号（COUT（1）至COUT（m））输出辅助电容信号（CSS（1）至CSS（m））。 在扫描周期（T1）之后设定空闲时段（T2）。 在空闲时段（T2）期间，CS驱动器（500）根据CS时钟信号（CCK​​）以空闲周期CS频率（fcck2）被驱动。 空闲时段CS频率（fcck2）低于扫描周期CS频率（fcck1）。

公开(公告)号：US20140176845A1

公开(公告)日：2014-06-26

申请号：US14234450

申请日：2012-08-03

申请人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G02F1/1362 ,  G02F1/1333

CPC分类号： G02F1/136213 ,  G02F1/1333 ,  G02F1/136227

摘要： In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.

摘要翻译： 为了抑制像素电极和源极线之间的串扰以减少闪烁，LCD器件包括：栅极线102和栅极线105，其设置为栅格图案; 像素电极111，其以矩阵图案排列，以对应于栅极线和源极线的交点; 透明辅助电容电极109; 以及开关元件121，被配置为根据从栅极线102施加的扫描信号将从源极线105提供的图像信号电压施加到像素电极111.开关元件121通过使用氧化物半导体层104形成，并且 透明辅助电容电极109设置在源极线105和像素电极111之间。

公开(公告)号：US20140168182A1

公开(公告)日：2014-06-19

申请号：US14235125

申请日：2012-07-25

申请人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G02F1/136213 ,  G09G3/3614 ,  G09G3/3655 ,  G09G2300/0876 ,  G09G2330/023 ,  G11C19/28

摘要： Provided is a liquid crystal display device with reduced power consumption employing a CS drive method.A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).

摘要翻译： 提供了采用CS驱动方法降低功耗的液晶显示装置。 CS驱动器（500）由CS移位寄存器（510）和CS输出部分（520）组成。 CS移位寄存器（510）根据CS时钟信号CCK输出控制信号（COUT（1）至COUT（m））。 CS输出部分（520）分别根据控制信号（COUT（1）至COUT（m））输出辅助电容信号（CSS（1）至CSS（m））。 在扫描周期（T1）之后设定空闲时段（T2）。 在空闲时段（T2）期间，CS驱动器（500）根据CS时钟信号（CCK​​）以空闲周期CS频率（fcck2）被驱动。 空闲时段CS频率（fcck2）低于扫描周期CS频率（fcck1）。

公开(公告)号：US08698726B2

公开(公告)日：2014-04-15

申请号：US13983411

申请日：2012-07-25

申请人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G09G3/36

CPC分类号： G09G3/36 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/0213 ,  G09G2310/0218 ,  G09G2310/0297 ,  G09G2320/0219 ,  G09G2330/023

摘要： There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

摘要翻译： 提供了具有降低的功耗的SSD显示设备。 选择电路（400）由k个选择块（410（1）至410（k））组成。 每个选择块由三个薄膜晶体管组成。 三个薄膜晶体管分别具有提供给它们的栅极端子的选择控制信号（CT）的三相。 提供扫描期间（T1），并且后跟空闲期间（T2）。 在空闲时段（T2）中，根据空闲周期频率（fck2）的选择控制信号（CT），使每个选择块中的三个薄膜晶体管成为导通状态。 空闲周期频率（fck2）低于扫描周期频率（fck1）。

公开(公告)号：US20100321356A1

公开(公告)日：2010-12-23

申请号：US12867124

申请日：2009-02-16

申请人： Christopher Brown ,  Kohhei Tanaka ,  Hiromi Katoh

发明人： Christopher Brown ,  Kohhei Tanaka ,  Hiromi Katoh

IPC分类号： G09G5/00 ,  H01L33/00

CPC分类号： H01L27/14643 ,  H01L27/1214 ,  H01L29/78621 ,  H01L29/78624 ,  H04N5/3745

摘要： A thin-film transistor (1) of the present invention which (i) is used in a path in which a current flows in a given single direction and (ii) has high-concentration impurity regions (3 and 4) which are provided on both sides of a channel region (5) has a low-concentration impurity region (6) which is provided to be sandwiched only between (i) one of the high-concentration impurity regions (3 and 4) into which carriers corresponding to a polarity of the high-concentration impurity regions (3 and 4) move in accordance with the given single direction and (ii) the channel region (5). This provides a thin-film transistor which is less affected by a display signal and carries out on/off control with respect to an output signal of a photodetector that is provided in a pixel which constitutes a display screen of a display device.

摘要翻译： 本发明的薄膜晶体管（1）（i）用于电流在给定的单一方向上流动的路径，（ii）具有高浓度杂质区（3和4） 通道区域（5）的两侧具有低浓度杂质区域（6），其被设置为仅夹在（i）一个高浓度杂质区域（3和4）之间，载流子对应于极性 的高浓度杂质区域（3和4）根据给定的单一方向移动，并且（ii）沟道区域（5）移动。 这提供了一种较少受显示信号影响的薄膜晶体管，并且相对于构成显示装置的显示屏的像素中提供的光电检测器的输出信号进行开/关控制。

公开(公告)号：US09111503B2

公开(公告)日：2015-08-18

申请号：US13985271

申请日：2012-02-07

申请人： Kohhei Tanaka

发明人： Kohhei Tanaka

IPC分类号： G09G5/00 ,  G09G3/36 ,  G02F1/1362

CPC分类号： G09G3/3648 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/136286 ,  G09G3/3614 ,  G09G3/3655 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0833 ,  G09G2310/0248 ,  G09G2310/0256 ,  G09G2310/08 ,  G09G2330/021

摘要： In each pixel formation portion of a display device, an amplification electrode is provided which is connected to a drain electrode of a thin-film transistor whose gate electrode is connected to a gate bus line and whose source electrode is connected to a source bus line. A second-capacitor is formed by the amplification electrode and a pixel electrode. A selection period is constituted by a precharge period and an amplification period. In the precharge period, a video signal potential is applied to the pixel electrode and a potential of a control wire is applied to the amplification electrode. In the amplification period, a video signal potential is applied to the amplification electrode with the pixel electrode being in a floating state.

摘要翻译： 在显示装置的每个像素形成部分中，提供了一个放大电极，该放大电极连接到一个薄膜晶体管的漏电极，该栅极连接到栅极总线，其源极连接到源极总线。 第二电容器由放大电极和像素电极形成。 选择期间由预充电期间和放大期间构成。 在预充电期间，对像素电极施加视频信号电位，并且将控制线的电位施加到放大电极。 在放大期间，在像素电极为浮置状态的情况下，对放大电极施加视频信号电位。

公开(公告)号：US20130321492A1

公开(公告)日：2013-12-05

申请号：US13985274

申请日：2012-02-07

申请人： Kohhei Tanaka

发明人： Kohhei Tanaka

IPC分类号： G09G3/36

CPC分类号： G09G3/3655 ,  G02F1/133555 ,  G02F1/136213 ,  G02F1/13624 ,  G02F2001/13606 ,  G02F2201/52 ,  G09G3/3614 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0833 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0248 ,  G09G2310/08 ,  G09G2330/021

摘要： In a liquid crystal display device having a configuration in which one pixel is divided into a plurality of sub pixels, low power consumption is realized by reducing an amplitude of a video signal. In each pixel formation portion, an amplification circuit unit including a second-capacitor is provided between a dark display pixel electrode and a bright display pixel electrode. A selection period consists of a precharge period and an amplification period. In the precharge period, a potential of a control wiring is applied to the dark display pixel electrode, and a potential of a video signal line is applied to the bright display pixel electrode. In the amplification period, a potential of the video signal line is applied to the dark display pixel electrode in the state where the bright display pixel electrode is placed in a floating state.

摘要翻译： 在具有将一个像素分割成多个子像素的结构的液晶显示装置中，通过减小视频信号的幅度来实现低功耗。 在每个像素形成部分中，在暗显示像素电极和亮显示像素电极之间设置包括第二电容器的放大电路单元。 选择期间由预充电期间和放大期间构成。 在预充电期间，向暗显示像素电极施加控制布线的电位，并且对亮显示像素电极施加视频信号线的电位。 在放大期间，在亮显示像素电极处于浮置状态的状态下，将视频信号线的电位施加到暗显示像素电极。

公开(公告)号：US09230497B2

公开(公告)日：2016-01-05

申请号：US13985274

申请日：2012-02-07

申请人： Kohhei Tanaka

发明人： Kohhei Tanaka

IPC分类号： G09G3/36 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/136

CPC分类号： G09G3/3655 ,  G02F1/133555 ,  G02F1/136213 ,  G02F1/13624 ,  G02F2001/13606 ,  G02F2201/52 ,  G09G3/3614 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0833 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0248 ,  G09G2310/08 ,  G09G2330/021

摘要： In a liquid crystal display device having a configuration in which one pixel is divided into a plurality of sub pixels, low power consumption is realized by reducing an amplitude of a video signal. In each pixel formation portion, an amplification circuit unit including a second-capacitor is provided between a dark display pixel electrode and a bright display pixel electrode. A selection period consists of a precharge period and an amplification period. In the precharge period, a potential of a control wiring is applied to the dark display pixel electrode, and a potential of a video signal line is applied to the bright display pixel electrode. In the amplification period, a potential of the video signal line is applied to the dark display pixel electrode in the state where the bright display pixel electrode is placed in a floating state.

摘要翻译： 在具有将一个像素分割成多个子像素的结构的液晶显示装置中，通过减小视频信号的幅度来实现低功耗。 在每个像素形成部分中，在暗显示像素电极和亮显示像素电极之间设置包括第二电容器的放大电路单元。 选择期间由预充电期间和放大期间构成。 在预充电期间，向暗显示像素电极施加控制布线的电位，并且对亮显示像素电极施加视频信号线的电位。 在放大期间，在亮显示像素电极处于浮置状态的状态下，将视频信号线的电位施加到暗显示像素电极。