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公开(公告)号：US08758090B2
公开(公告)日：2014-06-24
申请号：US13328846
申请日：2011-12-16
Applicant: Qun Shao , Li Jiang , Mingqi Li , Qingling Wang
Inventor： Qun Shao , Li Jiang , Mingqi Li , Qingling Wang
IPC: B24B37/04
CPC classification number: B24B37/34 , B24B37/245
Abstract: A polishing method includes: mounting a wafer on a fixed abrasive polishing pad located on a polishing platen; delivering a polishing slurry to the fixed abrasive polishing pad to polish the wafer; and adsorbing abrasive particles generated during the polishing process with an electrode. The electrode has a polarity opposite to a polarity of charges of the abrasive particles. A polishing device includes a polishing platen, a fixed abrasive polishing pad, a slurry pipeline and a polarity changer having an electrode. Therefore, the abrasive particles generated during the polishing process are removed, which prevents the wafer from being scratched, thereby increasing wafer yield and improving efficiency.
Abstract translation: 抛光方法包括：将晶片安装在位于抛光平台上的固定研磨抛光垫上; 将抛光浆料输送到固定研磨抛光垫以抛光晶片; 并用电极吸附在抛光过程中产生的磨料颗粒。 电极具有与磨料颗粒的电荷极性相反的极性。 抛光装置包括抛光台板，固定研磨抛光垫，浆料管道和具有电极的极性更换器。 因此，在抛光过程中产生的磨料颗粒被去除，从而防止晶片被划伤，从而提高晶片的产量并提高效率。
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公开(公告)号：US20120190278A1
公开(公告)日：2012-07-26
申请号：US13328846
申请日：2011-12-16
Applicant: Qun Shao , Li Jiang , Mingqi Li , Qingling Wang
Inventor： Qun Shao , Li Jiang , Mingqi Li , Qingling Wang
IPC: B24B1/00
CPC classification number: B24B37/34 , B24B37/245
Abstract: A polishing method includes: mounting a wafer on a fixed abrasive polishing pad located on a polishing platen; delivering a polishing slurry to the fixed abrasive polishing pad to polish the wafer; and adsorbing abrasive particles generated during the polishing process with an electrode. The electrode has a polarity opposite to a polarity of charges of the abrasive particles. A polishing device includes a polishing platen, a fixed abrasive polishing pad, a slurry pipeline and a polarity changer having an electrode. Therefore, the abrasive particles generated during the polishing process are removed, which prevents the wafer from being scratched, thereby increasing wafer yield and improving efficiency.
Abstract translation: 抛光方法包括：将晶片安装在位于抛光平台上的固定研磨抛光垫上; 将抛光浆料输送到固定研磨抛光垫以抛光晶片; 并用电极吸附在抛光过程中产生的磨料颗粒。 电极具有与磨料颗粒的电荷极性相反的极性。 抛光装置包括抛光台板，固定研磨抛光垫，浆料管道和具有电极的极性更换器。 因此，在抛光过程中产生的磨料颗粒被去除，从而防止晶片被划伤，从而提高晶片的产量并提高效率。
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公开(公告)号：US20120171939A1
公开(公告)日：2012-07-05
申请号：US13184907
申请日：2011-07-18
IPC: B24B57/00
Abstract: A polishing element used in chemical mechanical polishing device includes a polishing plate for holding a wafer that is provided; a polishing pad arm, one end of the polishing pad arm being fixed, another end of the polishing pad arm holding a polishing pad, and the polishing pad arm driving the polishing pad for moving relatively to the wafer; the polishing pad moving relatively to the wafer with drive from the polishing pad arm, and the polishing pad arm ensuring the polishing pad contacting the wafer during movement; and a slurry supply route for supplying polishing slurry between the polishing pad and the wafer during polishing. The present invention also provides a chemical mechanical polishing device. It makes for realizing miniaturization of a chemical mechanical polishing device, saving polishing slurry and improving utilization rate of the polishing pad in the chemical mechanical polishing device to apply the present invention.
Abstract translation: 用于化学机械抛光装置的抛光元件包括：用于保持设置的晶片的抛光板; 抛光垫臂，抛光垫臂的一端固定，抛光垫臂的另一端保持抛光垫，抛光垫臂驱动抛光垫以相对于晶片移动; 所述抛光垫相对于来自所述抛光垫臂的驱动的所述晶片移动;以及所述抛光垫臂，其确保所述抛光垫在运动期间与所述晶片接触; 以及用于在抛光期间在抛光垫和晶片之间提供抛光浆料的浆料供应路线。 本发明还提供一种化学机械抛光装置。 实现化学机械研磨装置的小型化，节省抛光浆料，提高化学机械研磨装置的抛光垫的利用率，从而应用本发明。
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公开(公告)号：US08858817B2
公开(公告)日：2014-10-14
申请号：US13176674
申请日：2011-07-05
IPC: C03C15/00 , B24B37/34 , B24B37/005 , B24B55/00
CPC classification number: B24B37/005 , B24B37/34 , B24B55/00
Abstract: A polishing apparatus and exception handling method thereof is disclosed, the exception handling method of polishing apparatus includes: sending an alarm signal when an alarm is generated because of an exception during polishing; and processing a wafer in the polishing apparatus with organic acid solution according to the received alarm signal. The method and apparatus prevent the metal material from corrosion which causes device failure, when there is an alarm generated because of an exception which stops the apparatus during polishing.
Abstract translation: 公开了一种研磨装置及其例外处理方法，抛光装置的异常处理方法包括：在抛光时由于异常而产生报警时发送报警信号; 并根据所接收的报警信号，在有机酸溶液中处理抛光装置中的晶片。 当由于在抛光期间停止装置的异常而产生报警时，该方法和装置防止金属材料腐蚀，导致装置故障。
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15.发明授权Semiconductor device having metal alloy gate and method for manufacturing the same 有权具有金属合金栅极的半导体器件及其制造方法公开(公告)号：US08815728B2
公开(公告)日：2014-08-26
申请号：US13486994
申请日：2012-06-01
IPC: H01L21/3205
CPC classification number: H01L29/4966 , H01L21/28088 , H01L29/401 , H01L29/495 , H01L29/517 , H01L29/518 , H01L29/66545
Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device uses an aluminum alloy, rather than aluminum, for a metal gate. Therefore, the surface of the high-k metal gate after the CMP is aluminum alloy rather than pure aluminum, which can greatly reduce defects, such as corrosion, pits and damage, in the metal gate and improve reliability of the semiconductor device.
Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件使用铝合金而不是铝合金作为金属栅极。 因此，CMP后的高k金属栅极的表面是铝合金而不是纯铝，这可以大大减少金属栅极中的腐蚀，凹坑和损伤等缺陷，提高半导体器件的可靠性。
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Patent Agency Ranking
公开(公告)号：US08541308B2
公开(公告)日：2013-09-24
申请号：US13244196
申请日：2011-09-23
IPC: H01L21/461 , H01L21/302
CPC classification number: H01L21/31053 , C09G1/04 , H01L29/495 , H01L29/66545
Abstract: A polishing method and a method for forming a gate are provided. The method includes forming a dummy gate on a semiconductor substrate including a sacrificial oxide layer and a polysilicon layer which covers the sacrificial oxide layer, forming spacers around the dummy gate, and successively forming a silicon nitride layer and a dielectric layer covering the silicon nitride layer. The method further includes polishing the dielectric layer until the silicon nitride layer is exposed, polishing the silicon nitride layer on a fixed abrasive pad until the polysilicon layer is exposed by using a polishing slurry with a PH value ranging from 10.5 to 11 and comprising an anionic surfactant or a zwitterionic surfactant. Additionally, the method includes forming an opening after removing the dummy gate, and forming a gate in the opening. The method eliminates potential erosion and dishing caused in the polishing of the silicon nitride layer.
Abstract translation: 提供了一种用于形成栅极的抛光方法和方法。 该方法包括在包括牺牲氧化物层和覆盖牺牲氧化物层的多晶硅层的半导体衬底上形成伪栅极，在虚拟栅极周围形成间隔物，并且依次形成氮化硅层和覆盖氮化硅层的电介质层 。 该方法还包括抛光电介质层，直到暴露氮化硅层，在固定的研磨垫上抛光氮化硅层，直到通过使用pH值范围为10.5至11的抛光浆料暴露多晶硅层，并且包含阴离子 表面活性剂或两性离子表面活性剂。 此外，该方法包括在去除虚拟门之后形成开口，并在开口中形成栅极。 该方法消除了在氮化硅层的抛光中引起的潜在的腐蚀和凹陷。
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公开(公告)号：US08507336B2
公开(公告)日：2013-08-13
申请号：US13176678
申请日：2011-07-05
IPC: H01L21/336 , H01L21/28
CPC classification number: H01L29/66545 , H01L21/31053 , H01L29/6653 , H01L29/7833
Abstract: The invention provides a method for forming a metal gate and a method for forming a MOS transistor. The method for forming a metal gate includes: providing a substrate; forming a sacrificial oxide layer and a polysilicon gate on the substrate; forming a silicon oxide layer on sidewalls of the sacrificial oxide layer and the polysilicon gate; forming a stop layer that covers the substrate; removing a part of the stop layer in the spacers; forming a second interlayer dielectric layer that covers the first interlayer dielectric layer, the spacers and the polysilicon gate; polishing the second interlayer dielectric layer to expose the spacers and the polysilicon gate; removing the polysilicon gate to form a trench; removing the sacrificial oxide layer in the trench; and forming a metal gate in the trench. The invention prevents from recesses and therefore metal bridge and metal residuals in the recesses.
Abstract translation: 本发明提供一种用于形成金属栅极的方法和用于形成MOS晶体管的方法。 形成金属栅极的方法包括：提供基板; 在所述基板上形成牺牲氧化物层和多晶硅栅极; 在所述牺牲氧化物层和所述多晶硅栅极的侧壁上形成氧化硅层; 形成覆盖所述基板的停止层; 去除隔离物中的一部分停止层; 形成覆盖所述第一层间电介质层，所述间隔物和所述多晶硅栅极的第二层间电介质层; 抛光所述第二层间电介质层以暴露所述间隔物和所述多晶硅栅极; 去除多晶硅栅极以形成沟槽; 去除沟槽中的牺牲氧化物层; 并在沟槽中形成金属栅极。 本发明防止了凹槽中的金属桥和凹陷中的金属残留物。
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公开(公告)号：US20130045581A1
公开(公告)日：2013-02-21
申请号：US13323489
申请日：2011-12-12
IPC: H01L21/336
CPC classification number: H01L21/28123
Abstract: The present invention discloses a method of manufacturing semiconductor devices. The method includes a step of performing a chemical mechanical planarization processing on a poly-silicon layer before fabricating a poly-silicon gate such that the poly-silicon gates obtained in subsequent fabrication process are kept at the same height, which thus avoids the silicon nitride residues issue that occurs in the prior art. Therefore, the present invention is capable of enhancing product yield of semiconductor devices and improving device performances.
Abstract translation: 本发明公开了半导体器件的制造方法。 该方法包括在制造多晶硅栅极之前对多晶硅层进行化学机械平面化处理的步骤，使得在随后的制造工艺中获得的多晶硅栅极保持在相同的高度，从而避免了氮化硅 在现有技术中发生的残留问题。 因此，本发明能够提高半导体器件的产量，提高器件性能。
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公开(公告)号：US08313991B2
公开(公告)日：2012-11-20
申请号：US13178455
申请日：2011-07-07
IPC: H01L21/338 , H01L21/336 , H01L21/3205 , H01L21/4763
CPC classification number: H01L29/66545 , H01L29/78
Abstract: A method is provided for fabricating a high-K metal gate MOS device. The method includes providing a semiconductor substrate having a surface region, a gate oxide layer on the surface region, a sacrificial gate electrode on the gate oxide layer, and a covering layer on the sacrificial gate electrode, an inter-layer dielectric layer on the semiconductor substrate and the sacrificial gate electrode. The method also includes planarizing the inter-layer dielectric layer to expose a portion of the covering layer atop the sacrificial gate electrode, implanting nitrogen ions into the inter-layer dielectric layer until a depth of implantation is deeper than a thickness of the portion of the covering layer atop the sacrificial gate electrode and polishing the inter-layer dielectric layer to expose a surface of the sacrificial gate electrode, removing the sacrificial gate electrode, and depositing a metal gate.
Abstract translation: 提供了制造高K金属栅极MOS器件的方法。 该方法包括提供具有表面区域，表面区域上的栅极氧化物层，栅极氧化物层上的牺牲栅极电极和牺牲栅电极上的覆盖层的半导体衬底，半导体上的层间电介质层 基板和牺牲栅电极。 该方法还包括平坦化层间电介质层以暴露牺牲栅电极顶部的覆盖层的一部分，将氮离子注入到层间电介质层中，直到植入深度比该部分的厚度更深 覆盖层，并抛光该层间电介质层以暴露牺牲栅电极的表面，去除牺牲栅极电极和沉积金属栅极。
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公开(公告)号：US20120142254A1
公开(公告)日：2012-06-07
申请号：US13176674
申请日：2011-07-05
IPC: B24B51/00
CPC classification number: B24B37/005 , B24B37/34 , B24B55/00
Abstract: A polishing apparatus and exception handling method thereof is disclosed, the exception handling method of polishing apparatus includes: sending an alarm signal when an alarm is generated because of an exception during polishing; and processing a wafer in the polishing apparatus with organic acid solution according to the received alarm signal. The method and apparatus prevent the metal material from corrosion which causes device failure, when there is an alarm generated because of an exception which stops the apparatus during polishing.
Abstract translation: 公开了一种研磨装置及其例外处理方法，抛光装置的异常处理方法包括：在抛光时由于异常而产生报警时发送报警信号; 并根据所接收的报警信号，在有机酸溶液中处理抛光装置中的晶片。 当由于在抛光期间停止装置的异常而产生报警时，该方法和装置防止金属材料腐蚀，导致装置故障。
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