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Patent Agency Ranking
公开(公告)号：US09190104B2
公开(公告)日：2015-11-17
申请号：US13802627
申请日：2013-03-13
Applicant: LSI Corporation
Inventor： Shaohua Yang , Kapil Gaba , Yoon L. Liow , Xuebin Wu , Qi Zuo , YuQing Yang , Lei Wang
CPC classification number: G11B20/10046
Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for calibration during data processing. As an example, a data processing system is discussed that includes a sample averaging circuit operable to average digital samples from an analog to digital converter circuit over multiple instances of an analog input to yield an X-average output, and a selector circuit operable to select one of the digital samples or the X-average output as a processing output.
Abstract translation: 实施例涉及用于数据处理的系统和方法，更具体地涉及在数据处理期间用于校准的系统和方法。 作为示例，讨论了一种数据处理系统，其包括采样平均电路，其可操作以在模拟输入的多个实例上平均来自模数转换器电路的数字采样以产生X平均输出，以及可操作以选择 数字样本之一或X平均输出作为处理输出。
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公开(公告)号：US09130590B2
公开(公告)日：2015-09-08
申请号：US14070541
申请日：2013-11-03
Applicant: LSI Corporation
Inventor： Dan Liu , Qi Zuo , Chung-Li Wang , Zongwang Li , Lei Wang
CPC classification number: H03M13/1125 , G11B20/1833 , G11B2020/185 , H03M13/1117 , H03M13/114 , H03M13/1171 , H03M13/13 , H03M13/2957 , H03M13/6331 , H03M13/6337 , H03M13/6343 , H03M13/658
Abstract: A non-binary layered low density parity check decoder includes a variable node processor operable to generate variable node to check node messages and to calculate perceived values based on normalized check node to variable node messages and on normalized decoder inputs, and to output normalized decoded values, and a check node processor operable to generate the check node to variable node messages based on normalized variable node to check node messages.
Abstract translation: 非二进制分层低密度奇偶校验解码器包括可变节点处理器，其可操作以生成可变节点以校验节点消息，并且基于归一化校验节点到可变节点消息和归一化解码器输入来计算感知值，并且输出归一化解码值 以及校验节点处理器，用于基于归一化变量节点生成校验节点到可变节点消息以检查节点消息。
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公开(公告)号：US20150092290A1
公开(公告)日：2015-04-02
申请号：US14070541
申请日：2013-11-03
Applicant: LSI Corporation
Inventor： Dan Liu , Qi Zuo , Chung-Li Wang , Zongwang Li , Lei Wang
CPC classification number: H03M13/1125 , G11B20/1833 , G11B2020/185 , H03M13/1117 , H03M13/114 , H03M13/1171 , H03M13/13 , H03M13/2957 , H03M13/6331 , H03M13/6337 , H03M13/6343 , H03M13/658
Abstract: A non-binary layered low density parity check decoder includes a variable node processor operable to generate variable node to check node messages and to calculate perceived values based on normalized check node to variable node messages and on normalized decoder inputs, and to output normalized decoded values, and a check node processor operable to generate the check node to variable node messages based on normalized variable node to check node messages.
Abstract translation: 非二进制分层低密度奇偶校验解码器包括可变节点处理器，其可操作以生成可变节点以校验节点消息，并且基于归一化校验节点到可变节点消息和归一化解码器输入来计算感知值，并且输出归一化解码值 以及校验节点处理器，用于基于归一化变量节点生成校验节点到可变节点消息以检查节点消息。
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公开(公告)号：US20140172934A1
公开(公告)日：2014-06-19
申请号：US13802627
申请日：2013-03-13
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Kapil Gaba , Yoon L. Liow , Xuebin Wu , Qi Zuo , YuQing Yang , Lei Wang
IPC: G06F17/10
CPC classification number: G11B20/10046
Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for calibration during data processing.
Abstract translation: 实施例涉及用于数据处理的系统和方法，更具体地涉及在数据处理期间用于校准的系统和方法。
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15.发明申请公开(公告)号：US20140101510A1
公开(公告)日：2014-04-10
申请号：US13645838
申请日：2012-10-05
Applicant: LSI CORPORATION
Inventor： Chung-Li Wang , Dan Liu , Qi Zuo , Zongwang Li , Shaohua Yang
IPC: H03M13/09
CPC classification number: H03M13/09 , H03M13/1117 , H03M13/114 , H03M13/116 , H03M13/1171 , H03M13/6331 , H03M13/6343 , H03M13/658
Abstract: The present inventions are related to systems and methods for decoding data in an LDPC layer decoder for LDPC codes with overlapped circulants.
Abstract translation: 本发明涉及用于对具有重叠循环的LDPC码的LDPC层解码器中的数据进行解码的系统和方法。
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