中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

21 records (took 0.015 seconds)

    Branch metric computation and noise predictive calibration/adaptation for over-sampled Y samples
    2.
    发明授权
    Branch metric computation and noise predictive calibration/adaptation for over-sampled Y samples 有权
    过采样Y样本的分支度量计算和噪声预测校准/适应

    公开(公告)号：US08625217B1

    公开(公告)日：2014-01-07

    申请号：US13628579

    申请日：2012-09-27

    Applicant: LSI Corporation

    Inventor： Shaohua Yang ,  Xuebin Wu

    IPC: G11B20/10 ,  H04B1/10

    Abstract: Techniques are disclosed for performing branch metric computations/noise predictive calibration/adaptation for over-sampled Y samples. In one or more embodiments, the techniques employ a data processing apparatus (circuit) that includes a parallel to serial convertor configured to receive a first stream of sample data (e.g., Y samples) and a second stream of sample data (e.g., Z samples). The parallel to serial convertor is operable to combine the first stream of sample data and the second stream of sample data into a combined stream of sample data (e.g., combined Y and Z samples). The data processing apparatus (circuit) further includes a filter (e.g., a noise predictive finite impulse response (NPFIR) filter, a noise whitening filter, such as a noise predictive calibration/adaptation module (NPCAL) filter, and so forth) that is configured to receive the combined stream of sample data and whiten noise in the combined stream of sample data.

    Abstract translation: 公开了用于执行用于过采样Y样本的分支度量计算/噪声预测校准/适应的技术。 在一个或多个实施例中，该技术采用数据处理装置（电路），其包括并行到串行转换器，其被配置为接收第一采样数据流（例如，Y采样）和第二采样数据流（例如，Z采样 ）。 并行到串行转换器可操作以将第一采样数据流和第二采样数据流组合成采样数据的组合流（例如，组合的Y和Z采样）。 数据处理装置（电路）还包括滤波器（例如，噪声预测有限脉冲响应（NPFIR）滤波器），噪声白化滤波器（例如噪声预测校准/适配模块（NPCAL）滤波器等等）） 被配置为在合并的采样数据流中接收采样数据的组合流和增白噪声。

    Systems and methods for recovered data stitching
    3.
    发明授权
    Systems and methods for recovered data stitching 有权
    恢复数据拼接的系统和方法

    公开(公告)号：US09400797B2

    公开(公告)日：2016-07-26

    申请号：US14047319

    申请日：2013-10-07

    Applicant: LSI Corporation

    Inventor： Shaohua Yang ,  Xuebin Wu ,  Shu Li

    IPC: G06F11/00 ,  H03M13/00 ,  G06F17/30 ,  G06F11/08 ,  G06F11/10 ,  G11B20/10 ,  G11B20/18

    CPC classification number: G06F17/30135 ,  G06F11/085 ,  G06F11/1076 ,  G11B20/10009 ,  G11B20/10268 ,  G11B20/18 ,  G11B20/1866

    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for combining recovered portions of a data set. In one particular case, a system is disclosed that includes a stitching circuit and a data recovery circuit. The stitching circuit is operable to: receive a data set including at least a first fragment and a second fragment; replicate data from at least one of the first fragment and the second fragment as stitching values; and aggregate the first fragment with the second fragment with the stitching values between the first fragment and the second fragment to yield a combined data set. The data recovery circuit is operable to process the combined data set to yield an original data set.

    Abstract translation: 一般涉及数据处理的系统和方法，更具体地涉及用于组合数据集的恢复部分的系统和方法。 在一个特定情况下，公开了一种包括缝合电路和数据恢复电路的系统。 缝合电路可操作以：接收包括至少第一片段和第二片段的数据集; 将来自第一片段和第二片段中的至少一个的数据复制为拼接值; 并且将具有第二片段的第一片段与第一片段和第二片段之间的缝合值聚合以产生组合数据集。 数据恢复电路可操作以处理组合数据集以产生原始数据集。

    Read channel sampling utilizing two quantization modules for increased sample bit width
    4.
    发明授权
    Read channel sampling utilizing two quantization modules for increased sample bit width 有权
    使用两个量化模块读取通道采样以增加采样位宽度

    公开(公告)号：US09281007B2

    公开(公告)日：2016-03-08

    申请号：US14198008

    申请日：2014-03-05

    Applicant: LSI Corporation

    Inventor： Xuebin Wu ,  Yang Han ,  Weijun Tan ,  Shaohua Yang

    IPC: G11B20/10 ,  G11B20/14 ,  G11B5/55 ,  G11B5/012 ,  G10L19/02

    CPC classification number: G11B20/10046 ,  G10L19/0208 ,  G11B5/012 ,  G11B5/5526 ,  G11B5/553 ,  G11B20/10009 ,  G11B20/10268 ,  G11B20/1403

    Abstract: A communication channel structure and a decoding method supported by such a communication channel structure are disclosed. Such a communication channel includes a digital filter configured for filtering an input signal and two quantizer configured for quantizing the filtered signal. A first quantizer is utilized to quantize the filtered signal to produce a first quantized sample having a first precision and a second quantizer is utilized to quantize the filtered signal to produce a second quantized sample having a second precision, wherein the second precision is different from the first precision. The communication channel also includes an iterative decoder configured for utilizing the first quantized sample for a first global iteration of a decoding process and utilizing the second quantized sample for at least one subsequent global iteration of the decoding process.

    Abstract translation: 公开了一种由这种通信信道结构支持的通信信道结构和解码方法。 这样的通信信道包括被配置为对输入信号进行滤波的数字滤波器和被配置为量化滤波信号的两个量化器。 利用第一量化器来量化滤波后的信号以产生具有第一精度的第一量化样本，并且使用第二量化器量化滤波信号以产生具有第二精度的第二量化样本，其中第二精度不同于 第一精度。 通信信道还包括迭代解码器，其被配置为利用第一量化样本进行解码过程的第一全局迭代，并且利用第二量化样本进行解码过程的至少一个后续全局迭代。

    Zero phase start estimation in readback signals
    5.
    发明授权
    Zero phase start estimation in readback signals 有权
    回读信号中的零相位起始估计

    公开(公告)号：US09123383B1

    公开(公告)日：2015-09-01

    申请号：US14197748

    申请日：2014-03-05

    Applicant: LSI Corporation

    Inventor： Xuebin Wu ,  Shaohua Yang ,  Zhi Bin Li ,  Haitao Xia

    IPC: G11B20/20 ,  G11B20/10 ,  G11B5/09

    CPC classification number: G11B20/1024 ,  G11B20/10037

    Abstract: A data storage system identifies analog-to-digital conversion samples with amplitude below a certain threshold. Remaining samples are grouped according to phase into one or more quadrants. A multi-coordinate with overlapping quadrants is used to further differentiate sample points. The system then computes an average phase for zero phase start estimation.

    Abstract translation: 数据存储系统识别幅度低于某一阈值的模数转换样本。 剩余样品根据阶段分组成一个或多个象限。 使用具有重叠象限的多坐标来进一步区分采样点。 然后，该系统计算零相位开始估计的平均相位。

    SYNC MARK DETECTION USING BRANCH METRICS FROM DATA DETECTOR
    8.
    发明申请
    SYNC MARK DETECTION USING BRANCH METRICS FROM DATA DETECTOR 有权
    从数据检测器使用分支量测的SYNC MARK检测

    公开(公告)号：US20140185159A1

    公开(公告)日：2014-07-03

    申请号：US13728443

    申请日：2012-12-27

    Applicant: LSI CORPORATION

    Inventor： Shaohua Yang ,  Yoon L. Liow ,  Wu Chang ,  Xuebin Wu

    IPC: G11B20/14

    CPC classification number: G11B20/10222

    Abstract: Methods and apparatus are provided for detecting a sync mark in a storage system, such as a hard disk drive. A sync mark is detected in a storage system by obtaining one or more branch metrics from a data detector in the storage system; generating one or more sync mark metrics using the one or more branch metrics from the data detector; and identifying the sync mark based on the sync mark metrics. An input data set is optionally compared with a plurality of portions of a sync mark pattern to yield corresponding comparison values and the comparison values can be summed to obtain at least one result. A sync mark found signal is asserted based upon the at least one result.

    Abstract translation: 提供了用于检测诸如硬盘驱动器的存储系统中的同步标记的方法和装置。 在存储系统中通过从存储系统中的数据检测器获得一个或多个分支度量来检测同步标记; 使用来自所述数据检测器的所述一个或多个分支度量来生成一个或多个同步标记度量; 以及基于同步标记度量识别同步标记。 输入数据组可选地与同步标记图案的多个部分进行比较，以产生相应的比较值，并且可以将比较值相加以获得至少一个结果。 基于至少一个结果来确定发现同步标记信号。

    READ CHANNEL DATA SIGNAL DETECTION WITH REDUCED-STATE TRELLIS
    9.
    发明申请
    READ CHANNEL DATA SIGNAL DETECTION WITH REDUCED-STATE TRELLIS 审中-公开
    阅读频道数据信号检测与减少状态TRELLIS

    公开(公告)号：US20140181625A1

    公开(公告)日：2014-06-26

    申请号：US13721417

    申请日：2012-12-20

    Applicant: LSI CORPORATION

    Inventor： Weijun Tan ,  Xuebin Wu ,  Shaohua Yang

    IPC: H03M13/25

    CPC classification number: H03M13/3746 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/29 ,  H03M13/6331

    Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to determine a first set of soft outputs, hard decisions and reliability indicators for a read channel data signal, to determine a second set of soft outputs, hard decisions and reliability indicators based at least in part on the first set of soft outputs, hard decisions and reliability indicators, and to perform an iterative decoding process to decode the read channel data signal based at least in part on the second set of soft outputs, hard decisions and reliability indicators. The first set of soft outputs, hard decisions and reliability indicators are used to determine a reduced-state trellis for determining the second set of soft outputs, hard decisions and reliability indicators.

    Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路被配置为确定用于读通道数据信号的第一组软输出，硬判决和可靠性指示符，以至少部分地基于第一组来确定第二组软输出，硬判决和可靠性指示符 软输出，硬判决和可靠性指示器，并且执行迭代解码处理，以至少部分地基于第二组软输出，硬判决和可靠性指示器来解码读通道数据信号。 第一组软输出，硬判决和可靠性指标用于确定用于确定第二组软输出，硬判决和可靠性指标的缩小状态网格。

    Systems and methods for floating variance branch metric calculation
    10.
    发明授权
    Systems and methods for floating variance branch metric calculation 有权
    用于浮动方差分支度量计算的系统和方法

    公开(公告)号：US09324363B2

    公开(公告)日：2016-04-26

    申请号：US13945216

    申请日：2013-07-18

    Applicant: LSI Corporation

    Inventor： Weijun Tan ,  Shaohua Yang ,  Xuebin Wu

    IPC: G11B5/09 ,  G11B20/10

    CPC classification number: G11B20/10046 ,  G11B20/10268

    Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data detection. As one example, a data processing system is described that includes a variance calculation circuit operable to calculate a variance of a data input; and a branch metric calculation circuit operable to calculate a branch metric based at least in part on the variance.

    Abstract translation: 本发明涉及用于数据处理的系统和方法，更具体地涉及用于数据检测的系统和方法。 作为一个示例，描述了包括可操作以计算数据输入的方差的方差计算电路的数据处理系统; 以及分支度量计算电路，其可操作以至少部分地基于所述方差来计算分支度量。

Patent Agency Ranking