Multiple sync mark storage system
    14.
    发明授权
    Multiple sync mark storage system 有权
    多重同步标记存储系统

    公开(公告)号:US09001445B1

    公开(公告)日:2015-04-07

    申请号:US14106537

    申请日:2013-12-13

    CPC classification number: G11B5/59655 G11B5/59616 G11B20/10222

    Abstract: A data processing system includes a number of analog to digital converters operable to sample analog signals obtained from a magnetic storage medium to yield digital signals, multiple sync mark detectors operable to search for a number of different sync marks in the digital signals, and a sync mark detector output comparator operable to compare an output of each of the sync mark detectors to identify detection errors.

    Abstract translation: 数据处理系统包括多个模数转换器,可操作以对从磁存储介质获得的模拟信号进行采样以产生数字信号,多个同步标记检测器可操作以搜索数字信号中的多个不同同步标记,以及同步 标记检测器输出比较器,用于比较每个同步标记检测器的输出以识别检测误差。

    Systems and methods for processing data with linear phase noise predictive filter
    16.
    发明授权
    Systems and methods for processing data with linear phase noise predictive filter 有权
    用线性相位噪声预测滤波器处理数据的系统和方法

    公开(公告)号:US08867154B1

    公开(公告)日:2014-10-21

    申请号:US13912171

    申请日:2013-06-06

    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for data processing with a linear phase noise predictive filter. A data processing system includes an equalizer circuit operable to filter a digital data input to yield equalized data, a linear phase noise predictive finite impulse response filter operable to filter the equalized data to yield filtered data, and a data detector circuit operable to apply a data detection algorithm to the filtered data to yield a detected output. The greatest tap coefficient for the linear phase noise predictive finite impulse response filter is at a center tap.

    Abstract translation: 用于数据处理的系统,方法,设备,电路,更具体地涉及用于使用线性相位噪声预测滤波器进行数据处理的系统和方法。 数据处理系统包括均衡器电路,可操作以对数字数据输入进行滤波以产生均衡的数据;线性相位噪声预测有限脉冲响应滤波器,可操作以对均衡的数据进行滤波以产生滤波后的数据;以及数据检测器电路,可操作以应用数据 检测算法对滤波后的数据产生检测输出。 线性相位噪声预测有限脉冲响应滤波器的最大抽头系数位于中心抽头。

    Systems and Methods for Preventing Adjacent Track Erasure
    17.
    发明申请
    Systems and Methods for Preventing Adjacent Track Erasure 有权
    防止相邻轨迹擦除的系统和方法

    公开(公告)号:US20140307345A1

    公开(公告)日:2014-10-16

    申请号:US13886170

    申请日:2013-05-02

    CPC classification number: G11B20/18 G11B20/10388

    Abstract: A data processing circuit includes a subtraction circuit operable to subtract an ideal version of a data pattern from a sampled version of a data pattern to yield a difference signal, an error calculation circuit operable to calculate an error between the ideal version of the data pattern and the sampled version of the data pattern based on the difference signal, and a comparator circuit operable to compare the error with a threshold value and operable to assert a track refresh signal if the error is greater than the threshold value. The track refresh signal is operable to trigger a magnetic storage device to refresh data on a data track.

    Abstract translation: 数据处理电路包括减法电路,其可操作以从数据模式的采样版本中减去数据模式的理想版本以产生差分信号;误差计算电路,用于计算数据模式的理想版本与 基于差分信号的数据模式的采样版本;以及比较器电路,其可操作以将误差与阈值进行比较,并且如果误差大于阈值则可用于断言轨迹刷新信号。 轨道刷新信号可操作以触发磁存储设备来刷新数据轨道上的数据。

    Systems and methods for fragmented data recovery
    19.
    发明授权
    Systems and methods for fragmented data recovery 有权
    分散数据恢复的系统和方法

    公开(公告)号:US09298720B2

    公开(公告)日:2016-03-29

    申请号:US14047441

    申请日:2013-10-07

    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for fragmenting a data set and recovering the fragmented data set. As one example, a data processing system is discussed that includes: a fragmenting circuit operable to separate a data set into at least a first fragment and a second fragment; and a transfer packet formation circuit operable to: append identification information to the front of the first fragment, and at least a first M+N bits of the second fragment to the end of the first fragment to yield a first transfer fragment, and aggregate the first transfer fragment with other transfer fragments to yield an aggregate output.

    Abstract translation: 一般涉及数据处理的系统和方法,更具体地涉及用于分段数据集和恢复碎片化数据集的系统和方法。 作为一个示例,讨论了数据处理系统,其包括:分段电路,其可操作以将数据集分成至少第一片段和第二片段; 以及传输分组形成电路,可操作用于:将标识信息附加到第一片段的前面,以及将第二片段的至少第一M + N比特附加到第一片段的末尾,以产生第一片段,并将 首先转移片段与其他转移片段产生总产量。

    Servo marginalization
    20.
    发明授权
    Servo marginalization 有权
    伺服边缘化

    公开(公告)号:US09053743B2

    公开(公告)日:2015-06-09

    申请号:US13832503

    申请日:2013-03-15

    Abstract: Servo channel noise limits are defined through Viterbi decisions based on servo gate signals. Y values are used to produce a first Viterbi decision at each servo gate. Viterbi decisions and Y values are used to produce ideal Y values. Y values and ideal Y values are used to produce an error value which is adjusted by a noise factor based on estimated channel characteristics. The noise value is combined with Y values and used to produce a second Viterbi decision at each servo gate.

    Abstract translation: 通过基于伺服门信号的维特比决定来定义伺服信道噪声限制。 Y值用于在每个伺服门产生第一维特比决定。 维特比决策和Y值用于产生理想的Y值。 Y值和理想Y值用于产生基于估计的信道特性由噪声因子调整的误差值。 噪声值与Y值组合,用于在每个伺服门产生第二维特比(Viterbi)判定。

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