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    HYBRID VIDEO DECODING APPARATUS FOR PERFORMING HARDWARE ENTROPY DECODING AND SUBSEQUENT SOFTWARE DECODING AND ASSOCIATED HYBRID VIDEO DECODING METHOD
    12.
    发明申请
    HYBRID VIDEO DECODING APPARATUS FOR PERFORMING HARDWARE ENTROPY DECODING AND SUBSEQUENT SOFTWARE DECODING AND ASSOCIATED HYBRID VIDEO DECODING METHOD 审中-公开
    用于执行硬件熵解码和后续软件解码和相关混合视频解码方法的混合视频解码设备

    公开(公告)号：US20170019679A1

    公开(公告)日：2017-01-19

    申请号：US15202538

    申请日：2016-07-05

    Applicant: MEDIATEK INC.

    Inventor： Sheng-Jen Wang ,  Ming-Long Wu ,  Chia-Yun Cheng ,  Yung-Chang Chang ,  Hao-Chun Chung ,  Yu-Cheng Chu ,  Shen-Kai Chang

    IPC: H04N19/50 ,  H04N19/176 ,  H04N19/91 ,  H04N19/70 ,  H04N19/44

    CPC classification number: H04N19/91 ,  H04N19/423 ,  H04N19/433

    Abstract: A hybrid video decoding apparatus has a hardware entropy decoder and a storage device. The hardware entropy decoder performs hardware entropy decoding to generate an entropy decoding result of a picture. The storage device has a plurality of storage areas allocated to buffer a plurality of entropy-decoded partial data, respectively, and is further arranged to store position information indicative of storage positions of the entropy-decoded partial data in the storage device. The entropy-decoded partial data are derived from the entropy decoding result of the picture, and are associated with a plurality of portions of the picture, respectively.

    Abstract translation: 混合视频解码装置具有硬件熵解码器和存储装置。 硬件熵解码器执行硬件熵解码以产生图像的熵解码结果。 存储装置具有分配用于分别缓冲多个熵解码的部分数据的多个存储区域，并且还被布置为将表示熵解码的部分数据的存储位置的位置信息存储在存储装置中。 熵解码的部分数据从图像的熵解码结果导出，并分别与图像的多个部分相关联。

    VIDEO RESIDUAL DECODING APPARATUS USING NEIGHBOR STORAGE DEVICE WITH SMALLER STORAGE SIZE TO STORE NEIGHBOR DATA FOR CONTEXT SELECTION AND ASSOCIATED METHOD
    13.
    发明申请
    VIDEO RESIDUAL DECODING APPARATUS USING NEIGHBOR STORAGE DEVICE WITH SMALLER STORAGE SIZE TO STORE NEIGHBOR DATA FOR CONTEXT SELECTION AND ASSOCIATED METHOD 有权

    公开(公告)号：US20230034698A1

    公开(公告)日：2023-02-02

    申请号：US17553819

    申请日：2021-12-17

    Applicant: MEDIATEK INC.

    Inventor： Sheng-Jen Wang ,  Ming-Long Wu

    IPC: H04N19/44 ,  H04N19/105 ,  H04N19/119 ,  H04N19/176

    Abstract: A video residual decoding apparatus includes a residual decoding circuit and a neighbor storage device. The residual decoding circuit applies residual decoding to a transform block, wherein the transform block is divided into M sub-blocks, M is a positive integer, and the M sub-blocks are processed by the residual decoding in a diagonal scan order. The neighbor storage device stores neighbor data that belong to neighboring sub-blocks and are referenced by the residual decoding of a current sub-block, wherein neighbor data belonging to a sub-block is derived from a residual decoding result of the sub-block, and a storage size of the neighbor storage device is not larger than a maximum data amount of neighbor data derived from residual decoding results of N sub-blocks, where N is a positive integer, and N is smaller than M.

    Video processing system using ring buffer and racing-mode ring buffer access control scheme
    14.
    发明授权
    Video processing system using ring buffer and racing-mode ring buffer access control scheme 有权

    公开(公告)号：US10984832B2

    公开(公告)日：2021-04-20

    申请号：US16734384

    申请日：2020-01-05

    Applicant: MEDIATEK INC.

    Inventor： Ming-Long Wu ,  Chia-Yun Cheng ,  Yung-Chang Chang

    IPC: G11B20/10 ,  H04N19/423 ,  H04N21/44 ,  H04N21/434 ,  H04N21/435 ,  H04N21/4363 ,  G09G5/393

    Abstract: A video processing system includes a storage device, a receiving circuit, an audio/video demultiplexing circuit, a video decoder, and a display engine. The storage device includes a data buffer, a bitstream buffer, and a display buffer. An output of the receiving circuit is written into the data buffer. An input of the audio/video demultiplexing circuit is read from the data buffer, and an output of the audio/video demultiplexing circuit is written into the bitstream buffer. An input of the video decoder is read from the bitstream buffer, and an output of the video decoder is written into the display buffer. An input of the display engine is read from the display buffer. Each of the data buffer, the bitstream buffer, and the display buffer is a ring buffer.

    ENTROPY DECODING APPARATUS WITH CONTEXT PRE-FETCH AND MISS HANDLING AND ASSOCIATED ENTROPY DECODING METHOD
    15.
    发明申请
    ENTROPY DECODING APPARATUS WITH CONTEXT PRE-FETCH AND MISS HANDLING AND ASSOCIATED ENTROPY DECODING METHOD 审中-公开

    公开(公告)号：US20200154108A1

    公开(公告)日：2020-05-14

    申请号：US16677598

    申请日：2019-11-07

    Applicant: MEDIATEK INC.

    Inventor： Ming-Long Wu ,  Chia-Yun Cheng ,  Yung-Chang Chang

    IPC: H04N19/13 ,  H04N19/44 ,  H04N19/70 ,  H04N19/172 ,  G06F9/38

    Abstract: An entropy decoding apparatus includes an entropy decoding circuit, a pre-fetch circuit, and a context pre-load buffer. The pre-fetch circuit pre-fetches at least one candidate context for entropy decoding of a part of an encoded bitstream of a frame before the entropy decoding circuit starts entropy decoding of the part of the encoded bitstream of the frame. The context pre-load buffer buffers the at least one candidate context. When a target context actually needed by entropy decoding of the part of the encoded bitstream of the frame is not available in the context pre-load buffer, the context pre-load buffer instructs the pre-fetch circuit to re-fetch the target context, and the entropy decoding circuit stalls entropy decoding of the part of the encoded bitstream of the frame.

    HYBRID VIDEO DECODER AND ASSOCIATED HYBRID VIDEO DECODING METHOD
    16.
    发明申请
    HYBRID VIDEO DECODER AND ASSOCIATED HYBRID VIDEO DECODING METHOD 审中-公开
    混合视频解码器和相关混合视频解码方法

    公开(公告)号：US20170026648A1

    公开(公告)日：2017-01-26

    申请号：US15209774

    申请日：2016-07-14

    Applicant: MEDIATEK INC.

    Inventor： Ming-Long Wu ,  Sheng-Jen Wang ,  Chia-Yun Cheng ,  Yu-Cheng Chu ,  Hao-Chun Chung ,  Shen-Kai Chang ,  Yung-Chang Chang

    IPC: H04N19/13 ,  H04N19/44 ,  H04N19/42 ,  H04N19/176

    CPC classification number: H04N19/13 ,  H04N19/46

    Abstract: A hybrid video decoder has a hardware decoding circuit, a software decoding circuit, and a meta-data access system. The hardware decoding circuit deals with a first portion of a video decoding process for at least a portion of a frame, wherein the first portion of the video decoding process includes entropy decoding. The software decoding circuit deals with a second portion of the video decoding process. The meta-data access system manages meta data transferred between the hardware decoding circuit and the software decoding circuit.

    Abstract translation: 混合视频解码器具有硬件解码电路，软件解码电路和元数据访问系统。 硬件解码电路处理帧的至少一部分的视频解码处理的第一部分，其中视频解码处理的第一部分包括熵解码。 软件解码电路处理视频解码过程的第二部分。 元数据访问系统管理在硬件解码电路和软件解码电路之间传送的元数据。

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