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    LOW-RIPPLE LATCH CIRCUIT FOR REDUCING SHORT-CIRCUIT CURRENT EFFECT
    11.
    发明申请
    LOW-RIPPLE LATCH CIRCUIT FOR REDUCING SHORT-CIRCUIT CURRENT EFFECT 有权
    用于减少短路电流效应的低纹波锁存电路

    公开(公告)号：US20160336927A1

    公开(公告)日：2016-11-17

    申请号：US15044114

    申请日：2016-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Yu-Hsin Lin

    IPC: H03K3/356 ,  H03M1/66

    CPC classification number: H03K3/356113 ,  H03K3/356121 ,  H03K3/356191 ,  H03M1/066 ,  H03M1/0872 ,  H03M1/66 ,  H03M3/464

    Abstract: A latch circuit includes an input stage, an amplifying stage and a clock gating circuit. The input stage is arranged for receiving at least a clock signal and a data control signal. The amplifying stage is coupled to the input stage and supplied by a supply voltage and a ground voltage, and is arranged for retaining a data value and outputting the data value according to the clock signal and the data control signal. The clock gating circuit is coupled to the amplifying stage, and is arranged for avoiding a short-circuit current between the supply voltage and the ground voltage.

    Abstract translation: 锁存电路包括输入级，放大级和时钟门控电路。 输入级被布置成用于接收至少一个时钟信号和数据控制信号。 放大级与输入级耦合，由供电电压和接地电压提供，并被配置为保持数据值并根据时钟信号和数据控制信号输出数据值。 时钟门控电路耦合到放大级，并且被布置为避免电源电压和接地电压之间的短路电流。

    Filter with combined resonator and integrator
    17.
    发明授权
    Filter with combined resonator and integrator 有权
    滤波器与组合谐振器和积分器

    公开(公告)号：US08952749B1

    公开(公告)日：2015-02-10

    申请号：US14038759

    申请日：2013-09-27

    Applicant: Mediatek Inc.

    Inventor： Hung-Chieh Tsai ,  Chen-Yen Ho ,  Yu-Hsin Lin

    IPC: H04B1/10 ,  H03H11/04

    CPC classification number: H03H11/1252 ,  H03H11/32

    Abstract: A filter comprises an integrator, a signal feeding path, a first operational amplifier and a second capacitor. The integrator comprises a first input terminal and a first output terminal. The signal feeding path comprises: a first resistor, having a first terminal coupled to the first output terminal; a first capacitor, having a first terminal coupled to the second terminal of the first resistor; and a second resistor, having a first terminal coupled to the integrator and having a second terminal coupled to the second terminal of the first capacitor. The first operational amplifier comprises a second input terminal coupled to the second terminal of the first resistor and the first terminal of the first capacitor, and comprises a second output terminal. The second capacitor comprises a first terminal coupled to the second terminal of the first capacitor, and comprises a second terminal coupled to the second output terminal.

    Abstract translation: 滤波器包括积分器，信号馈送路径，第一运算放大器和第二电容器。 积分器包括第一输入端和第一输出端。 信号馈送路径包括：第一电阻器，具有耦合到第一输出端子的第一端子; 第一电容器，具有耦合到第一电阻器的第二端子的第一端子; 以及第二电阻器，其具有耦合到积分器的第一端子，并具有耦合到第一电容器的第二端子的第二端子。 第一运算放大器包括耦合到第一电阻器的第二端子和第一电容器的第一端子的第二输入端子，并且包括第二输出端子。 第二电容器包括耦合到第一电容器的第二端子的第一端子，并且包括耦合到第二输出端子的第二端子。

    Envelope tracking supply modulator using linear amplifier with segmented output stage and associated wireless communication system
    18.
    发明授权
    Envelope tracking supply modulator using linear amplifier with segmented output stage and associated wireless communication system 有权

    公开(公告)号：US12047039B2

    公开(公告)日：2024-07-23

    申请号：US17358009

    申请日：2021-06-25

    Applicant: MEDIATEK INC.

    Inventor： Shih-Hsiung Chien ,  Chen-Yen Ho

    IPC: H03F1/02 ,  H03F3/195 ,  H03F3/24

    CPC classification number: H03F1/0227 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/451

    Abstract: A linear amplifier of an envelope tracking supply modulator includes a pre-driver stage circuit and an output stage circuit. The pre-driver stage circuit receives an envelope input, and generates a pre-driver output according to the envelope input. The output stage circuit receives the pre-driver output, and generates an amplifier output according to the pre-driver output. The amplifier output is involved in setting a modulated supply voltage of a power amplifier. The output stage circuit has a plurality of amplifiers, including a first amplifier and a second amplifier. When the power amplifier has a first output power level, the first amplifier is involved in setting the amplifier output, and the second amplifier is not involved in setting the amplifier output. When the power amplifier has a second output power level different from the first output power level, the first amplifier and the second amplifier are involved in setting the amplifier output.

    DIGITAL ENVELOPE TRACKING SUPPLY MODULATOR
    19.
    发明公开
    DIGITAL ENVELOPE TRACKING SUPPLY MODULATOR 审中-公开

    公开(公告)号：US20240186955A1

    公开(公告)日：2024-06-06

    申请号：US18525884

    申请日：2023-12-01

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Hsiang-Hui Chang ,  Ya-Ting Hsu ,  Ke-Horng Chen

    IPC: H03F1/02

    CPC classification number: H03F1/0216 ,  H03F3/21

    Abstract: A digital envelope tracking (DET) supply modulator is provided. The DET supply modulator includes a switching converter, a dynamic switched-capacitor circuit and a digital control circuit. The switching converter converts an input supply voltage into an output envelope tracking (ET) voltage according to a first control signal. The dynamic switched-capacitor circuit outputs multiple supplement voltages for supplementing alternating current (AC) components of the output ET voltage by multiple stages. More particularly, the dynamic switched-capacitor circuit comprises multiple switched-capacitor cells and a selection circuit, wherein the selection circuit is coupled to the multiple switched-capacitor cells. In detail, the multiple switched-capacitor cells generate the multiple supplement voltages, respectively, and the selection circuit controls switching of each of the multiple switched-capacitor cells according to a second control signal. The digital control circuit generates the first control signal and the second control signal according to a target envelope waveform of the output ET voltage.

    Notch circuit and power amplifier module
    20.
    发明授权
    Notch circuit and power amplifier module 有权

    公开(公告)号：US11632089B2

    公开(公告)日：2023-04-18

    申请号：US16878669

    申请日：2020-05-20

    Applicant: MEDIATEK Inc.

    Inventor： Wei-Che Tseng ,  Chen-Yen Ho

    IPC: H03F1/02 ,  H03F3/24 ,  H04B1/04 ,  H04B1/16 ,  H04B1/38

    Abstract: A notch circuit and a power amplifier module capable of reducing self-interference in a transceiver are provided. The transceiver includes a transmitter and a receiver, and the transmitter causes self-interference to the receiver. The transmitter includes a power amplifier module and the power amplifier module includes a notch circuit and a power amplifier. The notch circuit includes an inductor and a capacitor. The power amplifier amplifies an input transmission signal to generate an output transmission signal. The inductor receives a supply voltage. An amplitude of the supply voltage varies with the first input transmission signal. The capacitor is electrically connected to the inductor. The first output transmission signal (Tx_out1) is attenuated when a modulated frequency of the supply voltage is corresponding to a stopband.

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