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    Power supply with envelope tracking modulation
    1.
    发明授权
    Power supply with envelope tracking modulation 有权

    公开(公告)号：US11088660B2

    公开(公告)日：2021-08-10

    申请号：US16728193

    申请日：2019-12-27

    Applicant: MEDIATEK INC.

    Inventor： Shih-Mei Lin ,  Chien-Wei Kuan ,  Che-Hao Meng ,  Chen-Yen Ho

    IPC: H03F1/30 ,  H03F1/02 ,  H03F3/21

    Abstract: A power supply configured to supply a modulated voltage to a power amplifier is shown. The power supply has an alternating current (AC) component generator, a direct current (DC) component generator, and a transition accelerator. The AC component generator generates an AC component of the modulated voltage according to an envelope tracking signal. The DC component generator generates a DC component of the modulated voltage according to the operational voltage range of the power amplifier. The transition accelerator is coupled to an output terminal of the DC component generator to speed up the transition of the modulated voltage.

    Continuous time delta sigma modulator, analog to digital converter and associated compensation method
    2.
    发明授权
    Continuous time delta sigma modulator, analog to digital converter and associated compensation method 有权
    连续时间ΔΣ调制器，模数转换器和相关补偿方法

    公开(公告)号：US09537497B2

    公开(公告)日：2017-01-03

    申请号：US15044125

    申请日：2016-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Yu-Hsin Lin ,  Tze-Chien Wang

    IPC: H03M1/00 ,  H03M1/06 ,  H03M3/00

    CPC classification number: H03M1/06 ,  H03M3/37 ,  H03M3/422 ,  H03M3/464

    Abstract: A continuous time delta sigma modulator includes a summing circuit, a loop filter, an extraction circuit, a quantizer and a digital to analog converter. The summing circuit is arranged for subtracting a feedback signal by an input signal to generate a residual signal. The loop filter includes a plurality of amplifying stages connected in series and is arranged to receive the residual signal to generate a filtered residual signal. The extraction circuit is arranged for extracting a current from one of the amplifying stages and forwarding the extracted current to a following one of the amplifying stages. The quantizer is arranged for generating a digital output signal according to the filtered residual signal. The digital to analog converter is arranged for performing a digital to analog converting operation upon a signal derived from the digital output signal to generate the feedback signal to the summing circuit.

    Abstract translation: 连续时间ΔΣ调制器包括求和电路，环路滤波器，提取电路，量化器和数模转换器。 求和电路被布置为通过输入信号减去反馈信号以产生残余信号。 环路滤波器包括串联连接的多个放大级，并被布置为接收残余信号以产生滤波的残留信号。 提取电路被布置为从一个放大级提取电流，并将提取的电流转发到下一个放大级。 量化器被布置用于根据滤波的残留信号产生数字输出信号。 数模转换器被配置为根据从数字输出信号导出的信号执行数模转换操作，以产生到求和电路的反馈信号。

    Amplifier, fully-differential amplifier and delta-sigma modulator
    3.
    发明授权
    Amplifier, fully-differential amplifier and delta-sigma modulator 有权
    放大器，全差分放大器和Δ-Σ调制器

    公开(公告)号：US09007249B2

    公开(公告)日：2015-04-14

    申请号：US14134944

    申请日：2013-12-19

    Applicant: MediaTek Inc.

    Inventor： Chen-Yen Ho ,  Chi-Lun Lo ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC: H03M3/00 ,  H03F3/45 ,  H03F3/26 ,  H03F3/30

    CPC classification number: H03F1/0205 ,  H03F3/265 ,  H03F3/30 ,  H03F3/3023 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/18 ,  H03F2203/30021 ,  H03F2203/30033 ,  H03F2203/45022 ,  H03F2203/45134 ,  H03F2203/45138 ,  H03M3/39 ,  H03M3/50

    Abstract: An amplifier includes a front-end gain stage and an AC-coupled push-pull output stage. The AC-coupled push-pull output stage includes a first transistor, having a source, a drain and a gate, wherein the source of the first transistor is coupled to a first voltage level; a second transistor, having a source, a drain and a gate, wherein the source of the second transistor is coupled to a second voltage level, the gate of the second transistor is coupled to the front-end gain stage, and the drain of the second transistor is coupled to the drain of the first transistor to form an output terminal of the amplifier; an AC-coupled capacitor, which is a passive two terminal electrical component coupled between the front-end gain stage and the gate of the first transistor; and a resistance component, coupling the gate of the first transistor to a bias voltage level.

    Abstract translation: 放大器包括前端增益级和AC耦合推挽输出级。 AC耦合推挽输出级包括具有源极，漏极和栅极的第一晶体管，其中第一晶体管的源极耦合到第一电压电平; 具有源极，漏极和栅极的第二晶体管，其中所述第二晶体管的源极耦合到第二电压电平，所述第二晶体管的栅极耦合到所述前端增益级，并且所述漏极 第二晶体管耦合到第一晶体管的漏极，以形成放大器的输出端; AC耦合电容器，其是耦合在前端增益级与第一晶体管的栅极之间的无源双端电气元件; 以及电阻分量，将第一晶体管的栅极耦合到偏置电压电平。

    Linear amplifier having higher efficiency for envelope tracking modulator
    4.
    发明授权
    Linear amplifier having higher efficiency for envelope tracking modulator 有权

    公开(公告)号：US10608592B2

    公开(公告)日：2020-03-31

    申请号：US15871045

    申请日：2018-01-14

    Applicant: MEDIATEK INC.

    Inventor： Chen-Yen Ho ,  Yu-Hsin Lin

    IPC: H03F3/45 ,  H03F1/02 ,  H03F1/22 ,  H03F1/48 ,  H03F3/30

    Abstract: A linear amplifier is provided to have higher efficiency for an envelope tracking modulator. In one embodiment, a first stage amplifier circuit can be simply operated in a high gain mode or a high bandwidth mode for different applications, without using large chip area. In another embodiment, an output stage has a cascode structure whose dynamic range is controlled according to a voltage level of a supply voltage, to make a core device within the output stage have better protection and suitable dynamic range.

    Filters with order enhancement
    6.
    发明授权
    Filters with order enhancement 有权
    具有订单增强功能的过滤器

    公开(公告)号：US08810308B2

    公开(公告)日：2014-08-19

    申请号：US13758028

    申请日：2013-02-04

    Applicant: MediaTek Inc.

    Inventor： Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Chi-Lun Lo ,  Chen-Yen Ho

    IPC: H03K5/00 ,  H03H11/12

    CPC classification number: H03H11/1204 ,  H03H11/1252 ,  H03H11/126

    Abstract: A filter is provided. The filter receives an input signal and generates an output signal according to the input signal. The filter includes an input network, a high-pass network, and an operational circuit. The first input network provides a first normal path for the input signal to generate a first normal signal. The first high-pass network provides a first high-pass path for the input signal to generate a first high-pass signal. The operational circuit has first and second input terminals. The polarity of the second input terminal is inverse to that of the first input terminal. The operational circuit receives the first normal signal by the first input terminal and the first high-pass signal by the second input terminal such that a subtraction operation is performed on the first normal signal and the first high-pass filter to accomplish a low-pass filtering operation for generating the output signal.

    Abstract translation: 提供了一个过滤器。 滤波器接收输入信号，并根据输入信号产生输出信号。 滤波器包括输入网络，高通网络和操作电路。 第一输入网络为输入信号提供第一正常路径以产生第一正常信号。 第一高通网络为输入信号提供第一高通路径以产生第一高通信号。 该操作电路具有第一和第二输入端。 第二输入端子的极性与第一输入端子的极性相反。 操作电路由第一输入端接收第一正常信号和由第二输入端接收第一高通信号，使得对第一正常信号和第一高通滤波器执行减法运算以完成低通 用于产生输出信号的滤波操作。

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