公开(公告)号：US20170170930A1

公开(公告)日：2017-06-15

申请号：US15378750

申请日：2016-12-14

申请人： Sabih Guzelgoz ,  Hong Jik Kim ,  Tejas Maheshbhai Bhatt ,  Fariba Heidari

发明人： Sabih Guzelgoz ,  Hong Jik Kim ,  Tejas Maheshbhai Bhatt ,  Fariba Heidari

IPC分类号： H04L1/16 ,  H04W72/12 ,  H04L5/00

CPC分类号： H04L5/0055 ,  H04L1/0026 ,  H04L1/0035 ,  H04L1/1664 ,  H04L5/0057 ,  H04L25/067 ,  H04W72/121 ,  H04W72/1268

摘要： Methods and apparatus for providing soft and blind combining for PUSCH acknowledgement (ACK) processing. In an exemplary embodiment, a method includes soft-combining acknowledgement (ACK) bits received from a UE that are contained in a received sub-frame of symbols. The ACK bits are soft-combined using a plurality of scrambling sequences to generate a plurality of hypothetical soft-combined ACK bit streams. The method also includes receiving a parameter that identifies a selected scrambling sequence to be used. The method also includes decoding a selected hypothetical soft-combined ACK bit stream to generate a decoded ACK value, wherein the selected hypothetical soft-combined ACK bit stream is selected from the plurality of hypothetical soft-combined ACK bit streams based on the parameter.

公开(公告)号：US10311018B2

公开(公告)日：2019-06-04

申请号：US15292015

申请日：2016-10-12

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F17/14

摘要： A vector memory subsystem for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes a vector memory bank and a vector memory system (VMS) that generates input memory addresses that are used to store input data into the vector memory bank. The VMS also generates output memory addresses that are used to unload vector data from the memory banks. The input memory addresses are used to shuffle the input data in the memory bank based on a radix factorization associated with an N-point DFT, and the output memory addresses are used to unload the vector data from the memory bank to compute radix factors of the radix factorization.

公开(公告)号：US20180352557A1

公开(公告)日：2018-12-06

申请号：US15594497

申请日：2017-06-02

申请人： Tejas M. Bhatt ,  Gregg A. Bouchard ,  Hong Jik Kim ,  Jason D. Zebchuk ,  Ahmed Shahid

发明人： Tejas M. Bhatt ,  Gregg A. Bouchard ,  Hong Jik Kim ,  Jason D. Zebchuk ,  Ahmed Shahid

IPC分类号： H04W72/12 ,  G06F9/50 ,  G06F3/06

摘要： Methods and apparatus for a unified baseband architecture. In an exemplary embodiment, an apparatus includes a shared memory having a plurality of access ports and a scheduler that outputs scheduled jobs. Each scheduled job identifies data processing to be performed. The apparatus also includes a plurality of functional elements coupled to the plurality of access ports, respectively, to access the shared memory. Each functional element is operable to retrieve selected data from the shared memory, process the selected data to generate processed data, and store the processed data into the shared memory based on a received scheduled job.

公开(公告)号：US10114797B2

公开(公告)日：2018-10-30

申请号：US15272332

申请日：2016-09-21

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F17/14 ,  G06F17/16 ,  H04W16/18

摘要： A programmable vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values is disclosed. In an exemplary embodiment, an apparatus includes a memory bank and a vector data path pipeline coupled to the memory bank. The apparatus also includes a configurable mixed radix engine coupled to the vector data path pipeline. The configurable mixed radix engine is configurable to perform a selected radix computation selected from a plurality of radix computations. The configurable mixed radix engine performs the selected radix computation on data received from the memory bank through the pipeline to generate a radix result. The apparatus also includes a controller that controls how many radix computation iterations will be performed to compute an N-point DFT/IDFT based on a radix factorization.

公开(公告)号：US20170195281A1

公开(公告)日：2017-07-06

申请号：US15347663

申请日：2016-11-09

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： H04L29/12 ,  H04L27/26 ,  H04L29/06 ,  G06F17/14 ,  H04W4/00

CPC分类号： H04W4/80 ,  G06F17/142 ,  H04L27/2636

摘要： Twiddle factor generation for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes look-up table logic that receives twiddle control factors and outputs a selected twiddle factor scaler value (TFSV), a base vector generator that generates a base vector values based on the selected TFSV, and a twiddle column generator that generates a twiddle vector from the base vector.

公开(公告)号：US08457076B2

公开(公告)日：2013-06-04

申请号：US11654000

申请日：2007-01-17

申请人： Sung Lark Kwon ,  Dong Joo Park ,  Hyuck Chan Kwon ,  Young Kwon Ryu ,  Hoo Young Jeong ,  Hong Jik Kim ,  Jung Seung Lee ,  Jae Won Jang ,  Byoung Seong Park ,  Hee Gul Park

发明人： Sung Lark Kwon ,  Dong Joo Park ,  Hyuck Chan Kwon ,  Young Kwon Ryu ,  Hoo Young Jeong ,  Hong Jik Kim ,  Jung Seung Lee ,  Jae Won Jang ,  Byoung Seong Park ,  Hee Gul Park

IPC分类号： H04B7/216 ,  H04J1/06 ,  H04J11/00 ,  H04W4/00

CPC分类号： H04W72/082 ,  H04J13/0059 ,  H04L5/0005 ,  H04L5/0007 ,  H04L5/0037 ,  H04L5/023 ,  H04L27/2613 ,  H04L27/2626 ,  H04L27/2655

摘要： Embodiments of the present invention may provide an apparatus and a method for transmitting and receiving a random access channel (RACH) in a single carrier-frequency division multiple access (SC-FDMA) system. A frequency domain RACH signal may be mapped to a localized sub-frequency band of an entire frequency band available to the SC-FDMA system. A guard band including at least one sub carrier may be allocated between the RACH signal band and other channel signal bands. A guard time may be allocated between the RACH signal and other channel signals in the time domain. The RACH signal may include a short message including information related to a mobile station. The RACH signal may be detected in a frequency based method, a time based method or a sliding matched filter based method. Receiver complexity can be decreased if the RACH signal includes a CAZAC code sequence for a preamble. In such a case, a receive delay may be simply calculated and then adjusted more accurately.

摘要翻译： 本发明的实施例可以提供在单载波频分多址（SC-FDMA）系统中发送和接收随机接入信道（RACH）的装置和方法。 频域RACH信号可以映射到SC-FDMA系统可用的整个频带的本地化子频带。 可以在RACH信号频带和其它信道信号频带之间分配包括至少一个子载波的保护频带。 可以在RACH信号和时域中的其它信道信号之间分配保护时间。 RACH信号可以包括包括与移动台有关的信息的短消息。 可以基于频率的方法，基于时间的方法或基于滑动匹配滤波器的方法来检测RACH信号。 如果RACH信号包括用于前同步码的CAZAC码序列，则接收机复杂度可以降低。 在这种情况下，可以简单地计算接收延迟，然后更精确地进行调整。