公开(公告)号：US09128769B2

公开(公告)日：2015-09-08

申请号：US13272937

申请日：2011-10-13

申请人： Jeffrey Schroeder ,  Jeff Pangborn ,  Najeeb Ansari ,  Bryan Chin ,  Leo Chen ,  Ahmed Shahid ,  Paul Scrobohaci ,  Chee Hu ,  Michael Carns ,  Wu Ye ,  Brian Hunter

发明人： Jeffrey Schroeder ,  Jeff Pangborn ,  Najeeb Ansari ,  Bryan Chin ,  Leo Chen ,  Ahmed Shahid ,  Paul Scrobohaci ,  Chee Hu ,  Michael Carns ,  Wu Ye ,  Brian Hunter

IPC分类号： G06F9/46 ,  G06F9/50

CPC分类号： G06F9/5077

摘要： In one embodiment, a processor comprises a plurality of hardware resources, each hardware resource having a clock cycle. The processor also comprises a plurality of work stores, each work store assigned into one of a plurality of virtual functions if a mode of the processor is set to a virtual function mode, and each work store assigned into one physical function if the mode of the processor is set to a physical function mode. The processor further comprises dispatch logic configured to dispatch work from any work store corresponding to any virtual function or physical function to any released hardware resources.

摘要翻译： 在一个实施例中，处理器包括多个硬件资源，每个硬件资源具有时钟周期。 如果处理器的模式被设置为虚拟功能模式，则处理器还包括多个工作存储，每个工作存储被分配到多个虚拟功能中的一个，并且如果分配给一个物理功能的模式 处理器设置为物理功能模式。 所述处理器还包括配置逻辑，所述调度逻辑被配置为将对应于任何虚拟功能或物理功能的任何工作存储器的工作分配给任何已发布的硬件资源。

公开(公告)号：US09065860B2

公开(公告)日：2015-06-23

申请号：US13565735

申请日：2012-08-02

申请人： Jeffrey A. Pangborn ,  Gregg A. Bouchard ,  Rajan Goyal ,  Najeeb I. Ansari ,  Ahmed Shahid

发明人： Jeffrey A. Pangborn ,  Gregg A. Bouchard ,  Rajan Goyal ,  Najeeb I. Ansari ,  Ahmed Shahid

IPC分类号： G06F12/00 ,  H04L29/06 ,  G06F13/16 ,  G06F12/08 ,  G06F12/02 ,  G06F12/04 ,  G06F12/06 ,  G06N5/02 ,  H04L12/26 ,  H04L12/747 ,  H04L12/851 ,  H04L12/801 ,  H04L12/741 ,  G06F9/50 ,  H04L29/08 ,  G06F9/46

CPC分类号： H04L63/06 ,  G06F3/0629 ,  G06F3/0647 ,  G06F9/46 ,  G06F9/5016 ,  G06F9/5027 ,  G06F11/203 ,  G06F12/00 ,  G06F12/0207 ,  G06F12/04 ,  G06F12/06 ,  G06F12/0623 ,  G06F12/0802 ,  G06F12/0868 ,  G06F12/126 ,  G06F13/16 ,  G06F13/1642 ,  G06N5/02 ,  G06N5/027 ,  G11C7/1075 ,  H04L43/18 ,  H04L45/742 ,  H04L45/745 ,  H04L47/2441 ,  H04L47/39 ,  H04L63/0227 ,  H04L63/0263 ,  H04L63/10 ,  H04L67/10 ,  H04L69/02 ,  H04L69/22 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/14 ,  Y02D10/22

摘要： A processor with on-chip memory including a plurality of physical memory banks is disclosed. The processor includes a method, and corresponding apparatus, of enabling multi-access to the plurality of physical memory banks. The method comprises selecting a subset of multiple access requests to be executed in at least one clock cycle over at least one of a number of access ports connected to the plurality of physical memory banks, the selected subset of access requests addressed to different physical memory banks, among the plurality of memory banks, and scheduling the selected subset of access requests, each over a separate access port.

摘要翻译： 公开了一种具有多个物理存储体的片上存储器的处理器。 该处理器包括一种能够对多个物理存储体进行多访问的方法和相应的装置。 该方法包括：通过连接到多个物理存储体的多个访问端口中的至少一个来选择要在至少一个时钟周期中执行的多个访问请求的子集，所选择的访问请求的子集寻址到不同的物理存储体 ，并且在所述多个存储体之中，并且每个通过单独的访问端口调度所选择的访问请求子集。

公开(公告)号：US20090201935A1

公开(公告)日：2009-08-13

申请号：US12028586

申请日：2008-02-08

申请人： David T. Hass ,  Kaushik Kuila ,  Ahmed Shahid

发明人： David T. Hass ,  Kaushik Kuila ,  Ahmed Shahid

IPC分类号： H04L12/56

CPC分类号： H04L69/22 ,  G06F9/30054 ,  G06F9/3836 ,  G06F9/3851 ,  H04L45/00 ,  H04L45/7453 ,  H04L45/7457

摘要： An apparatus and method are provided for allocating a plurality of packets to different processor threads. In operation, a plurality of packets are parsed to gather packet information. Additionally, a parse operation is performed utilizing the packet information to generate a key, and a hash algorithm is performed on this key to produce a hash. Further, the packets are allocated to different processor threads, utilizing the hash or the key.

摘要翻译： 提供了一种用于将多个分组分配给不同处理器线程的装置和方法。 在操作中，解析多个分组以收集分组信息。 此外，使用分组信息来执行解析操作以生成密钥，并且对该密钥执行散列算法以产生散列。 此外，使用散列或密钥将分组分配给不同的处理器线程。

公开(公告)号：US20190021013A1

公开(公告)日：2019-01-17

申请号：US15693020

申请日：2017-08-31

申请人： Ahmed Shahid ,  Jason Daniel Zebchuk ,  Tejas Maheshbhai Bhatt ,  Hong Jik Kim

发明人： Ahmed Shahid ,  Jason Daniel Zebchuk ,  Tejas Maheshbhai Bhatt ,  Hong Jik Kim

IPC分类号： H04W24/02 ,  H04L5/00 ,  H04B7/024 ,  H04W72/12 ,  H04L12/26 ,  H04L25/02

CPC分类号： H04W24/02 ,  H04B7/024 ,  H04B7/0837 ,  H04L5/0035 ,  H04L25/02 ,  H04L43/0852 ,  H04W72/12 ,  H04W72/1289 ,  H04W88/02 ,  H04W88/085

摘要： Methods and apparatus for coordinated multipoint receiver processing acceleration and latency reduction. In an exemplary embodiment, an apparatus includes a receiver that receives symbols from a wireless transmission and stores the symbols in a memory. The receiver also outputs an indicator that indicates that storage of the symbols in the memory has begun. The apparatus also includes a controller that outputs control signaling in response to the indicator. The apparatus also includes a link that acquires the symbols and remote scheduling and control information (RSCI) from the memory in response to receiving the control signaling. The link combines the symbols with the RSCI to form packets and transmits the packets to an external system.

公开(公告)号：US08724657B2

公开(公告)日：2014-05-13

申请号：US13205420

申请日：2011-08-08

申请人： Kaushik Kuila ,  David T. Hass ,  Ahmed Shahid

发明人： Kaushik Kuila ,  David T. Hass ,  Ahmed Shahid

IPC分类号： H04J3/24 ,  H04L12/56

CPC分类号： H04L49/901 ,  H04L49/9021 ,  H04L49/9042 ,  H04L69/02 ,  H04L69/22 ,  H04L69/26

摘要： A method and system of packet assembly is provided. The method includes providing a first packet descriptor. The first packet descriptor is a pointer-to-pointer (P2P) descriptor that includes pointer information. The method further includes retrieving a first pointer referenced by the pointer information of the first packet descriptor; providing the first pointer to a DMA engine; and using the DMA engine to retrieve packet data referenced by the first pointer.

摘要翻译： 提供了一种分组组装的方法和系统。 该方法包括提供第一分组描述符。 第一个分组描述符是包括指针信息的指针指针（P2P）描述符。 该方法还包括：检索由第一分组描述符的指针信息引用的第一指针; 提供第一个指向DMA引擎的指针; 并使用DMA引擎来检索由第一个指针引用的数据包数据。

公开(公告)号：US07995596B2

公开(公告)日：2011-08-09

申请号：US12120082

申请日：2008-05-13

申请人： Kaushik Kuila ,  David T. Hass ,  Ahmed Shahid

发明人： Kaushik Kuila ,  David T. Hass ,  Ahmed Shahid

IPC分类号： H04L12/28 ,  H04L12/56

CPC分类号： H04L49/901 ,  H04L49/9021 ,  H04L49/9042 ,  H04L69/02 ,  H04L69/22 ,  H04L69/26

摘要： A method is provided for offloading packet protocol encapsulation from software. In operation, pointer information is received. Furthermore, packet protocol encapsulation is offloaded from software by assembling packets in hardware, using the pointer information.

摘要翻译： 提供了一种从软件中卸载数据包协议封装的方法。 在操作中，接收指针信息。 此外，使用指针信息，通过在硬件中组装分组，从软件卸载分组协议封装。

公开(公告)号：US11115992B2

公开(公告)日：2021-09-07

申请号：US16110957

申请日：2018-08-23

申请人： Ahmed Shahid ,  Tejas Maheshbhai Bhatt ,  Eric Marenger

发明人： Ahmed Shahid ,  Tejas Maheshbhai Bhatt ,  Eric Marenger

IPC分类号： H04W72/12 ,  H04B1/403 ,  H04B1/38 ,  H04W88/06

摘要： Methods and apparatus for simultaneous multiprotocol processing of different radio standards using a common pipeline. In an exemplary embodiment an apparatus includes a plurality of wireless interfaces that transmit radio data symbols, a scheduler that outputs scheduled events that control transmission of the radio data symbols using any wireless interface type and any radio protocol, and an event processor that processes the transmission events to transport the radio data symbols to selected wireless interfaces for over the air transmission using selected radio protocols.

公开(公告)号：US20190141725A1

公开(公告)日：2019-05-09

申请号：US16110957

申请日：2018-08-23

申请人： Ahmed Shahid ,  Tejas Maheshbhai Bhatt ,  Eric Marenger

发明人： Ahmed Shahid ,  Tejas Maheshbhai Bhatt ,  Eric Marenger

IPC分类号： H04W72/12

摘要： Methods and apparatus for simultaneous multiprotocol processing of different radio standards using a common pipeline. In an exemplary embodiment an apparatus includes a plurality of wireless interfaces that transmit radio data symbols, a scheduler that outputs scheduled events that control transmission of the radio data symbols using any wireless interface type and any radio protocol, and an event processor that processes the transmission events to transport the radio data symbols to selected wireless interfaces for over the air transmission using selected radio protocols.

公开(公告)号：US20180352557A1

公开(公告)日：2018-12-06

申请号：US15594497

申请日：2017-06-02

申请人： Tejas M. Bhatt ,  Gregg A. Bouchard ,  Hong Jik Kim ,  Jason D. Zebchuk ,  Ahmed Shahid

发明人： Tejas M. Bhatt ,  Gregg A. Bouchard ,  Hong Jik Kim ,  Jason D. Zebchuk ,  Ahmed Shahid

IPC分类号： H04W72/12 ,  G06F9/50 ,  G06F3/06

摘要： Methods and apparatus for a unified baseband architecture. In an exemplary embodiment, an apparatus includes a shared memory having a plurality of access ports and a scheduler that outputs scheduled jobs. Each scheduled job identifies data processing to be performed. The apparatus also includes a plurality of functional elements coupled to the plurality of access ports, respectively, to access the shared memory. Each functional element is operable to retrieve selected data from the shared memory, process the selected data to generate processed data, and store the processed data into the shared memory based on a received scheduled job.

公开(公告)号：US08989220B2

公开(公告)日：2015-03-24

申请号：US13481122

申请日：2012-05-25

申请人： Paul G. Scrobohaci ,  Ahmed Shahid ,  Bryan W. Chin ,  Leo Chen

发明人： Paul G. Scrobohaci ,  Ahmed Shahid ,  Bryan W. Chin ,  Leo Chen

IPC分类号： H04L12/26 ,  H04L12/801 ,  H04L12/873 ,  H04W28/06

CPC分类号： H04L47/39 ,  H04L47/52 ,  H04W28/065

摘要： In one embodiment, a system includes a station circuit. The station circuit includes a data layer and a transport layer. The station circuit is capable of a source mode and a destination mode. The data layer of the station circuit in source mode disassembles a source packet into one or more source parcels and sends the one or more source parcels to the transport layer. The station circuit in destination mode receives the one or more destination parcels over a ring at its transport layer, reassembles the one or more destination parcels into a destination packet, and delivers the destination packet from the transport layer to the data layer. The transport layer of the station circuit in source mode transmits the one or more source parcels over the ring. The transport layer of the station circuit in destination mode receives the one or more destination parcels over the ring.

摘要翻译： 在一个实施例中，系统包括站电路。 站电路包括数据层和传输层。 站电路能够进行源模式和目的地模式。 源模式中的站电路的数据层将源数据包拆分成一个或多个源包，并将一个或多个源包发送到传输层。 目的地模式的台站电路在其传输层通过环上接收一个或多个目的地包裹，将一个或多个目的地包裹重新组合成目的地分组，并将目的地分组从传输层传送到数据层。 源模式中的站电路的传输层通过环发送一个或多个源包。 目的地模式中的站电路的传输层通过环接收一个或多个目的地地块。