公开(公告)号：US20170192936A1

公开(公告)日：2017-07-06

申请号：US15272332

申请日：2016-09-21

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F17/14 ,  G06F17/16

CPC分类号： G06F17/141 ,  G06F17/142 ,  G06F17/16 ,  H04W16/18

摘要： A programmable vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values is disclosed. In an exemplary embodiment, an apparatus includes a memory bank and a vector data path pipeline coupled to the memory bank. The apparatus also includes a configurable mixed radix engine coupled to the vector data path pipeline. The configurable mixed radix engine is configurable to perform a selected radix computation selected from a plurality of radix computations. The configurable mixed radix engine performs the selected radix computation on data received from the memory bank through the pipeline to generate a radix result. The apparatus also includes a controller that controls how many radix computation iterations will be performed to compute an N-point DFT/IDFT based on a radix factorization.

公开(公告)号：US20170192935A1

公开(公告)日：2017-07-06

申请号：US15292015

申请日：2016-10-12

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F15/80 ,  G06F9/30 ,  G06F17/14

CPC分类号： G06F15/8061 ,  G06F9/30036 ,  G06F17/141 ,  G06F17/142

摘要： A vector memory subsystem for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes a vector memory bank and a vector memory system (VMS) that generates input memory addresses that are used to store input data into the vector memory bank. The VMS also generates output memory addresses that are used to unload vector data from the memory banks. The input memory addresses are used to shuffle the input data in the memory bank based on a radix factorization associated with an N-point DFT, and the output memory addresses are used to unload the vector data from the memory bank to compute radix factors of the radix factorization.

公开(公告)号：US10311018B2

公开(公告)日：2019-06-04

申请号：US15292015

申请日：2016-10-12

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F9/30 ,  G06F15/80 ,  G06F17/14

摘要： A vector memory subsystem for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes a vector memory bank and a vector memory system (VMS) that generates input memory addresses that are used to store input data into the vector memory bank. The VMS also generates output memory addresses that are used to unload vector data from the memory banks. The input memory addresses are used to shuffle the input data in the memory bank based on a radix factorization associated with an N-point DFT, and the output memory addresses are used to unload the vector data from the memory bank to compute radix factors of the radix factorization.

公开(公告)号：US10114797B2

公开(公告)日：2018-10-30

申请号：US15272332

申请日：2016-09-21

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： G06F17/14 ,  G06F17/16 ,  H04W16/18

摘要： A programmable vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values is disclosed. In an exemplary embodiment, an apparatus includes a memory bank and a vector data path pipeline coupled to the memory bank. The apparatus also includes a configurable mixed radix engine coupled to the vector data path pipeline. The configurable mixed radix engine is configurable to perform a selected radix computation selected from a plurality of radix computations. The configurable mixed radix engine performs the selected radix computation on data received from the memory bank through the pipeline to generate a radix result. The apparatus also includes a controller that controls how many radix computation iterations will be performed to compute an N-point DFT/IDFT based on a radix factorization.

公开(公告)号：US20170195281A1

公开(公告)日：2017-07-06

申请号：US15347663

申请日：2016-11-09

申请人： Yuanbin Guo ,  Hong Jik Kim

发明人： Yuanbin Guo ,  Hong Jik Kim

IPC分类号： H04L29/12 ,  H04L27/26 ,  H04L29/06 ,  G06F17/14 ,  H04W4/00

CPC分类号： H04W4/80 ,  G06F17/142 ,  H04L27/2636

摘要： Twiddle factor generation for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes look-up table logic that receives twiddle control factors and outputs a selected twiddle factor scaler value (TFSV), a base vector generator that generates a base vector values based on the selected TFSV, and a twiddle column generator that generates a twiddle vector from the base vector.

公开(公告)号：US07492815B2

公开(公告)日：2009-02-17

申请号：US10997397

申请日：2004-11-24

申请人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph R. Cavallaro

发明人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph R. Cavallaro

IPC分类号： H04B1/707 ,  H03H7/30

CPC分类号： H04L25/03038 ,  H04B1/71055 ,  H04L25/0204 ,  H04L25/021 ,  H04L25/0242 ,  H04L25/0328 ,  H04L2025/03375 ,  H04L2025/03426 ,  H04L2025/03477 ,  H04L2025/03605

摘要： Disclosed is a LMMSE receiver that restores orthogonality of spreading codes in the downlink channel for a spread spectrum signal received over N receive antennas. The FFT-based chip equalizer tap solver reduces the direct matrix inverse of the prior art to the inverse of some submatrices of size N×N with the dimension of the receive antennas, and most efficiently reduces matrix inverses to no larger than 2×2. Complexity is further reduced over a conventional Fast Fourier Transform approach by Hermitian optimization to the inverse of submatrices and tree pruning. For a receiver with N=4 or N=2 with double oversampling, the resulting 4×4 matrices are partitioned into 2×2 block sub-matrices, inverted, and rebuilt into a 4×4 matrix. Common computations are found and repeated computations are eliminated to improve efficiency. Generic design architecture is derived from the special design blocks to eliminate redundancies in complex operations. Optimally, the architecture is parallel and pipelined.

摘要翻译： 公开了一种用于在N个接收天线上接收的扩频信号的下行链路信道中恢复扩频码的正交性的LMMSE接收机。 基于FFT的码片均衡器抽头解算器将现有技术的直接矩阵逆减少为具有接收天线的尺寸的尺寸为N×N的一些子矩阵的倒数，并且最有效地将矩阵反转减小到不大于2×2。 通过Hermitian优化，传统的快速傅立叶变换方法，复杂度进一步降低到子矩阵和树剪枝的倒数。 对于具有N = 4或N = 2的具有双重过采样的接收机，所得到的4×4矩阵被划分为2x2块子矩阵，被反转并重建为4×4矩阵。 发现常规计算，消除重复计算以提高效率。 通用设计架构源于特殊的设计模块，以消除复杂操作中的冗余。 最佳的架构是并行和流水线的。

公开(公告)号：US20060146759A1

公开(公告)日：2006-07-06

申请号：US11029900

申请日：2005-01-04

申请人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph Cavallaro

发明人： Yuanbin Guo ,  Jianzhong Zhang ,  Dennis McCain ,  Joseph Cavallaro

IPC分类号： H04B7/216

CPC分类号： H04L25/03057 ,  H04B1/707 ,  H04L2025/03426 ,  H04L2025/03522 ,  H04L2025/0363

摘要： An apparatus and corresponding method for receiving a MIMO cellular communication signal, the apparatus including: a Kalman filter type of equalizer, responsive to a received signal, for providing a corresponding processed signal indicating information conveyed by the received signal, responsive to a set of values indicating predicted state error correlation at a first instant of time given all noise estimates up through the first instant, for providing ta set of values indicating a product of measurement values and predicted state error correlation at a later instant of time given all process noise estimates up through the later instant. The filter is implemented so as to make use of the displacement structure of the state transition matrix of the Kalman filter allowing shifting operations in place of vector and matrix multiplications. The filter typically includes a transition and common data path that provides to both a Kalman gain processor and a Riccati processor the set of values indicating a product of measurement values and predicted state error correlation at a later instant of time given all process noise estimates up through the later instant.

摘要翻译： 一种用于接收MIMO蜂窝通信信号的装置和相应方法，所述装置包括：响应于接收信号的卡尔曼滤波器类型的均衡器，用于响应于一组值提供指示由接收信号传送的信息的相应处理信号 指示在第一时刻给出所有噪声估计值的第一时刻的预测状态误差相关性，以便在给定所有过程噪声估计上升的情况下提供指示测量值的乘积的值和在稍后时刻的预测状态误差相关性的值 通过后来的时刻。 滤波器被实现为利用卡尔曼滤波器的状态转移矩阵的位移结构，允许移位操作代替矢量和矩阵乘法。 该滤波器通常包括一个转换和公共数据路径，向卡尔曼增益处理器和Riccati处理器提供一组值，该值指示在所有过程噪声估计值通过的时间点的测量值和预测状态误差相关的乘积 后来的时刻。

公开(公告)号：US20060109897A1

公开(公告)日：2006-05-25

申请号：US10997442

申请日：2004-11-24

申请人： Yuanbin Guo ,  Dennis McCain ,  Joseph Cavallaro

发明人： Yuanbin Guo ,  Dennis McCain ,  Joseph Cavallaro

IPC分类号： H03K5/159 ,  H04B1/10

CPC分类号： H04L25/03044 ,  H04L2025/03426 ,  H04L2025/03643

摘要： A receiver, such as a CDMA MIMO receiver, includes a LMMSE-based chip-level equalizer constructed so as to implement a FFT accelerated iterative algorithm having a complexity of order O(Nlog2(N)), where N is the dimension of a covariance matrix. The equalizer uses one of an overlap-save or an over-lap add FFT architecture.

摘要翻译： 诸如CDMA MIMO接收机的接收机包括基于LMMSE的码片级均衡器，其被构造为实现具有阶数O（Nlog 2（N））的复杂度的FFT加速迭代算法， 其中N是协方差矩阵的维数。 均衡器使用重叠保存或重叠加法FFT架构之一。

公开(公告)号：US20190068349A1

公开(公告)日：2019-02-28

申请号：US15683376

申请日：2017-08-22

申请人： Yuanbin Guo

发明人： Yuanbin Guo

IPC分类号： H04L5/00 ,  H04W72/04

摘要： Methods and apparatus for uplink control channel detection. In an exemplary embodiment, a method includes generating Top-Q Channel Quality Indicator (CQI) candidates from information received over an uplink control channel, generating a CQI symbol for each of the Top-Q CQI candidates, and generating a CQI energy metric from the CQI symbols. If the uplink control channel is formatted in format 2, then performing operations of combining the CQI energy metric with a pilot energy metric to generate a combined metric and searching the combined metric to determine transmitted CQI bits. If the control channel is formatted in format 2a or format 2b, then performing operations of generating an acknowledgement (ACK) energy metric for ACK candidates, combining the CQI energy metric, the pilot energy metric, and the ACK energy metric to generate the combined metric, and searching the combined metric to determine transmitted CQI bits and ACK bits.

公开(公告)号：US08767849B2

公开(公告)日：2014-07-01

申请号：US13405134

申请日：2012-02-24

申请人： Bei Yin ,  Kiarash Amiri ,  Joseph R. Cavallaro ,  Yuanbin Guo

发明人： Bei Yin ,  Kiarash Amiri ,  Joseph R. Cavallaro ,  Yuanbin Guo

IPC分类号： H04K1/10 ,  H04L27/28 ,  H04L25/03 ,  H04J11/00 ,  H04B1/7107

CPC分类号： H04J11/004 ,  H04B1/71072 ,  H04L25/03159

摘要： A wireless receiver is constructed to equalize a time-domain received signal, detect a plurality of symbols of the equalized time-domain received signal, and perform interference cancellation on the time-domain received signal. The interference cancellation can be performed using a partial result produced by an IDFT, and may use only neighboring symbols in a detected plurality of symbols. The resulting wireless receiver can be constructed to operate efficiently under a plurality of wireless standards.

摘要翻译： 构造无线接收机以均衡时域接收信号，检测均衡的时域接收信号的多个符号，并对时域接收信号执行干扰消除。 可以使用由IDFT产生的部分结果来执行干扰消除，并且可以仅使用检测到的多个符号中的相邻符号。 所得到的无线接收机可被构造成在多种无线标准下有效地工作。