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公开(公告)号：US12086415B2
公开(公告)日：2024-09-10
申请号：US17662187
申请日：2022-05-05
Applicant: Micron Technology, Inc.
Inventor： Bryan David Kerstetter , Donald Martin Morgan
IPC: G06F3/06
CPC classification number: G06F3/0613 , G06F3/0619 , G06F3/0659 , G06F3/0679
Abstract: Methods, systems, and devices for frequency regulation for memory management commands are described. A memory device may maintain a respective first counter and second counter for each monitoring area of the memory device, where the counters may be incremented for each activate command received for the corresponding monitoring area. If the first counter satisfies a first threshold, an activate command issued to the monitoring area may be ignored. If the second counter fails to satisfy a second threshold, a memory management command issued to the monitoring area may be ignored and the memory device may maintain a value of the second counter, while decrementing the first counter. Alternatively, if the second counter satisfies the second threshold, the memory device may perform a memory management operation associated with a received memory management command and may decrement the first counter and the second counter.
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公开(公告)号：US20230350580A1
公开(公告)日：2023-11-02
申请号：US17730755
申请日：2022-04-27
Applicant: Micron Technology, Inc.
Inventor： Bryan David Kerstetter , Donald Martin Morgan , Alan J. Wilson
IPC: G06F3/06
CPC classification number: G06F3/0622 , G06F3/0604 , G06F3/0652 , G06F3/0659 , G06F3/0679
Abstract: Methods, systems, and devices for techniques for non-volatile data protection are described. As part of a power on operation, a non-volatile memory system may be configured to selectively stored data. For example, the memory system may determine whether a host system is authorized to access data stored in the memory system prior to a power off operation. If the memory system determines that the host system is authorized, the memory device may retain the data. If the memory system determines that the host system is not authorized, the memory system may erase all or a portion of the data. In some cases, the memory system may maintain a retain flag to determine whether the host system is authorized. Additionally or alternatively, the memory system may determine whether a password received from the host system is valid to determine whether the host system is authorized.
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公开(公告)号：US11579772B2
公开(公告)日：2023-02-14
申请号：US17105000
申请日：2020-11-25
Applicant: Micron Technology, Inc.
Inventor： Donald Martin Morgan , Alan J. Wilson
IPC: G06F3/06
Abstract: Methods, systems, and devices for retiring pages of a memory device are described. An ordered set of device information pages may be used to store device information. The device information pages may be in non-volatile memory. Each page may include a counter value of the number of accesses to indicate if the page includes valid data. A flag associated with the page may be set when the counter value reaches a threshold, to retire the page. Upon power-up, the device may determine which page to use, based on the flags. The flag may be stored in the page, or may be separate (e.g., fuse elements). If fuse elements are used, the page may store a programming-in-process flag to indicate when programming of the fuse element may not have been completed before power loss, in which case the programming may be restarted after power is restored.
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公开(公告)号：US20250094043A1
公开(公告)日：2025-03-20
申请号：US18893737
申请日：2024-09-23
Applicant: Micron Technology, Inc.
Inventor： Donald Martin Morgan , Alan J. Wilson
IPC: G06F3/06
Abstract: Methods, systems, and devices for retiring pages of a memory device are described. An ordered set of device information pages may be used to store device information. The device information pages may be in non-volatile memory. Each page may include a counter value of the number of accesses to indicate if the page includes valid data. A flag associated with the page may be set when the counter value reaches a threshold, to retire the page. Upon power-up, the device may determine which page to use, based on the flags. The flag may be stored in the page, or may be separate (e.g., fuse elements). If fuse elements are used, the page may store a programming-in-process flag to indicate when programming of the fuse element may not have been completed before power loss, in which case the programming may be restarted after power is restored.
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公开(公告)号：US20230359361A1
公开(公告)日：2023-11-09
申请号：US17662187
申请日：2022-05-05
Applicant: Micron Technology, Inc.
Inventor： Bryan David Kerstetter , Donald Martin Morgan
IPC: G06F3/06
CPC classification number: G06F3/0613 , G06F3/0619 , G06F3/0659 , G06F3/0679
Abstract: Methods, systems, and devices for frequency regulation for memory management commands are described. A memory device may maintain a respective first counter and second counter for each monitoring area of the memory device, where the counters may be incremented for each activate command received for the corresponding monitoring area. If the first counter satisfies a first threshold, an activate command issued to the monitoring area may be ignored. If the second counter fails to satisfy a second threshold, a memory management command issued to the monitoring area may be ignored and the memory device may maintain a value of the second counter, while decrementing the first counter. Alternatively, if the second counter satisfies the second threshold, the memory device may perform a memory management operation associated with a received memory management command and may decrement the first counter and the second counter.
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Patent Agency Ranking
公开(公告)号：US11733967B2
公开(公告)日：2023-08-22
申请号：US17873862
申请日：2022-07-26
Applicant: Micron Technology, Inc.
Inventor： Donald Martin Morgan
Abstract: Methods, systems, and devices for split and duplicate ripple circuits are described. A ripple circuit may be divided into stages, which may operate in parallel. For example, a first stage may have a finite number of possibilities for an output that is relevant for a second stage, and the second stages may be replicated according to the finite number of possibilities. The replicated second stages thus may operate concurrently with each other and the first stage, with each of the replicated second stages assuming a different possible output from the first stage. Once operation of the first stage is complete, the true output of the first stage may be used to select one of the second stages as corresponding to the correct assumed output, and the output of the selected second stage may be or may be included in a set of output signals for the circuit.
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公开(公告)号：US20230229304A1
公开(公告)日：2023-07-20
申请号：US18100803
申请日：2023-01-24
Applicant: Micron Technology, Inc.
Inventor： Donald Martin Morgan , Alan J. Wilson
IPC: G06F3/06
CPC classification number: G06F3/0604 , G06F3/0644 , G06F3/0679
Abstract: Methods, systems, and devices for retiring pages of a memory device are described. An ordered set of device information pages may be used to store device information. The device information pages may be in non-volatile memory. Each page may include a counter value of the number of accesses to indicate if the page includes valid data. A flag associated with the page may be set when the counter value reaches a threshold, to retire the page. Upon power-up, the device may determine which page to use, based on the flags. The flag may be stored in the page, or may be separate (e.g., fuse elements). If fuse elements are used, the page may store a programming-in-process flag to indicate when programming of the fuse element may not have been completed before power loss, in which case the programming may be restarted after power is restored.
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公开(公告)号：US20220164108A1
公开(公告)日：2022-05-26
申请号：US17105000
申请日：2020-11-25
Applicant: Micron Technology, Inc.
Inventor： Donald Martin Morgan , Alan J. Wilson
IPC: G06F3/06
Abstract: Methods, systems, and devices for retiring pages of a memory device are described. An ordered set of device information pages may be used to store device information. The device information pages may be in non-volatile memory. Each page may include a counter value of the number of accesses to indicate if the page includes valid data. A flag associated with the page may be set when the counter value reaches a threshold, to retire the page. Upon power-up, the device may determine which page to use, based on the flags. The flag may be stored in the page, or may be separate (e.g., fuse elements). If fuse elements are used, the page may store a programming-in-process flag to indicate when programming of the fuse element may not have been completed before power loss, in which case the programming may be restarted after power is restored.
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公开(公告)号：US11334458B2
公开(公告)日：2022-05-17
申请号：US17005027
申请日：2020-08-27
Applicant: Micron Technology, Inc.
Inventor： Alan J. Wilson , Donald Martin Morgan
Abstract: Methods, systems, and devices for completing memory repair operations interrupted by power loss are described. A command to perform a memory repair of a memory device may be received. A memory repair process of the memory device may be initiated, based on the command. The memory repair process may include programming fuse elements of the memory device. Information associated with the initiated memory repair process may be stored in a non-volatile memory. The memory repair process may be interrupted by a power interruption. During powerup of the memory device, it may be determined that the memory repair process was initiated and not completed before the powerup, based on the stored information. The memory repair process of the memory device may be continued, based on the determination. Upon completion of the memory repair process, the stored information may be cleared.
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公开(公告)号：US20210383888A1
公开(公告)日：2021-12-09
申请号：US16895960
申请日：2020-06-08
Applicant: Micron Technology, Inc.
Inventor： Nobuo Yamamoto , Donald Martin Morgan , Victor Wong , Jongtae Kwak
Abstract: Methods, systems, and devices for error control for memory device are described. A memory device may be configured to perform memory management operations including error control operations. For example, a memory device may be configured to perform an error control operation on data stored in a first memory cell coupled with a source row of a memory array. The memory device may be configured to write the data to a second memory cell coupled with the target row of the memory array based on performing the error control operation on the data and determine whether the management operation is complete based at least in part on the first column address of the first memory cell. The memory device may also generate an output signal to perform the error control operation on a third memory cell coupled with the source row based on determining whether the management operation is complete.
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