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公开(公告)号：US20210319816A1
公开(公告)日：2021-10-14
申请号：US16843628
申请日：2020-04-08
Applicant: Micron Technology, Inc.
Inventor： Zhi Qi Huang , Wei Lu Chu , Dong Pan
Abstract: Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof.
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公开(公告)号：US20210158858A1
公开(公告)日：2021-05-27
申请号：US17133755
申请日：2020-12-24
Applicant: Micron Technology, Inc.
IPC: G11C11/4093 , G11C11/4074
Abstract: Devices and methods include distributing biases for input buffers of a memory device. The devices include multiple input buffers configured to buffer data for storage in the multiple memory banks. The devices also include biasing generation and distribution circuitry configured to generate and distribute biases to the multiple input buffers. The biasing generation and distribution circuitry includes bias voltage generation circuitry and multiple remote resistor stacks each located at a corresponding input buffer of the input buffers and remote from the bias voltage generation circuitry.
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13.发明授权公开(公告)号：US11017833B2
公开(公告)日：2021-05-25
申请号：US16084119
申请日：2018-05-24
Applicant: MICRON TECHNOLOGY, INC.
IPC: G11C7/00 , G11C11/406
Abstract: Apparatuses and methods for pure-time, self-adopt sampling for RHR refresh. An example apparatus includes a memory bank comprising a plurality of rows each associated with a respective row address, and a sampling timing generator circuit configured to provide a timing signal having a plurality of pulses. Each of the plurality of pulses is configured to initiate sampling of a respective row address associated with a row of the plurality of rows to detect a row hammer attack. The sampling timing generator includes first circuitry configured to provide a first subset of pulses of the plurality of pulses during a first time period and includes second circuitry configured to initiate provision of a second subset of pulses of the plurality of pulses during a second time period after the first time period.
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14.发明授权公开(公告)号：US10998010B2
公开(公告)日：2021-05-04
申请号：US16823079
申请日：2020-03-18
Applicant: Micron Technology, Inc.
Inventor： Wei Lu Chu , Dong Pan
IPC: G11C5/14 , G11C11/4074
Abstract: Systems and devices are provided for fully discharging leakage current generated during standby and/or power down modes regardless of variations in PVT conditions. An apparatus may include a power generation unit that powers components of the apparatus and a bleeder circuit. The bleeder circuit may include an operational amplifier. Further, the bleeder circuit may include leakage current generator circuitry that is coupled to the operational amplifier and generates a first current that mimics leakage current generated by the power generation unit. Furthermore, the bleeder circuit may include leakage current mirroring circuitry that is coupled to an output of the operational amplifier and that generates a second current that mirrors the first current. In addition, the bleeder circuit may also include leakage current bleeder circuitry that is coupled to the leakage current mirroring circuitry and that generates a third current that sinks the leakage current to ground.
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公开(公告)号：US20200273502A1
公开(公告)日：2020-08-27
申请号：US16646503
申请日：2017-09-22
Applicant: Micron Technology, Inc.
IPC: G11C5/14 , G11C16/30 , G11C11/4074
Abstract: Apparatus and methods that have a semiconductor charge pump can be implemented in a variety of applications. Such a charge pump can have a charge pump unit core that includes a pump section and a single passgate coupled to the pump section to transfer charge, where the single passgate is a n-channel metal-oxide semiconductor (NMOS) transistor coupled directly to an input and an output of the charge pump unit core. The transfer of charge can be based on a set of clock signals. Additional apparatus, systems, and methods are disclosed.
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Patent Agency Ranking
公开(公告)号：US10425064B2
公开(公告)日：2019-09-24
申请号：US15373158
申请日：2016-12-08
Applicant: Micron Technology, Inc.
Inventor： Dong Pan , Wei Lu Chu
Abstract: Apparatus and methods for a delay circuit are provided. In an example, a delay circuit can include a resistor configured to receive a compensation current, a capacitor configured to receive a charge current based on the compensation current, a first compensation circuit configured to provide a control signal, and a charge-current coupling circuit. The first compensation circuit can include an inverter circuit configured to track an inverter threshold voltage across process, voltage and temperature variations, wherein an output of the inverter circuit is directly coupled to an input of the inverter circuit, and an amplifier configured to receive the output of the inverter circuit an provide the control signal. The charge-current coupling circuit can be configured to receive the control signal and to provide the compensation current and the charge current.
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公开(公告)号：US20190033905A1
公开(公告)日：2019-01-31
申请号：US16146982
申请日：2018-09-28
Applicant: MICRON TECHNOLOGY, INC.
Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.
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18.发明申请公开(公告)号：US20170089766A1
公开(公告)日：2017-03-30
申请号：US14866371
申请日：2015-09-25
Applicant: Micron Technology, Inc.
Inventor： Dong Pan
IPC: G01K7/01
Abstract: A temperature sensor is disclosed. The temperature sensor includes an analog core having at least first and second circuit nodes and configured to provide a temperature dependent output, a multiplexer coupled to the first and second circuit nodes and configured for at least first and second states in each of which the first circuit node couples to a different circuit element and in each of which the second circuit node couples to a different circuit element, and a controller coupled to the analog core and configured to provide a temperature measurement that is an average of at least first and second readings of the temperature dependent output of the analog core, the first reading taken while the multiplexer is in the first state, and the second reading taken while the multiplexer is in the second state.
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公开(公告)号：US09466337B1
公开(公告)日：2016-10-11
申请号：US14832583
申请日：2015-08-21
Applicant: Micron Technology, Inc.
Inventor： Dong Pan
IPC: G11C5/14 , G05F5/00 , H03K5/153 , G11C11/4074 , G01R19/00 , G01R19/165
CPC classification number: G11C5/143 , G01R19/0084 , G01R19/16566 , G05F5/00 , G11C5/147 , G11C7/04 , G11C11/4074 , G11C16/225 , H03K5/153
Abstract: Example apparatuses and methods may detect when one or more supply voltage levels have reached a trigger voltage. An example apparatus may include a terminal, a voltage reference circuit and a voltage detector circuit. The terminal may be configured to receive a first voltage, and the voltage reference circuit may be coupled to the terminal. The voltage reference circuit may be configured to receive the first voltage and provide a second voltage responsive, at least in part, to the first voltage. The voltage detector circuit may be configured to respond, at least in part, to the first and second voltages, and further configured to produce an output signal when the first voltage reaches a target level. The voltage detector circuit may include a first transistor including a gate configured to receive the second voltage, and a first resistor coupled in series between the terminal and the transistor.
Abstract translation: 示例性的设备和方法可以检测一个或多个电源电压何时达到触发电压。 示例性装置可以包括端子，电压参考电路和电压检测器电路。 终端可以被配置为接收第一电压，并且电压参考电路可以耦合到终端。 电压参考电路可以被配置为接收第一电压并且至少部分地响应于第一电压提供第二电压。 电压检测器电路可以被配置为至少部分地响应于第一和第二电压，并且还被配置为当第一电压达到目标电平时产生输出信号。 电压检测器电路可以包括第一晶体管，其包括被配置为接收第二电压的栅极，以及串联耦合在端子和晶体管之间的第一电阻器。
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公开(公告)号：US20160041042A1
公开(公告)日：2016-02-11
申请号：US14887138
申请日：2015-10-19
Applicant: Micron Technology, Inc.
Inventor： Dong Pan
Abstract: A semiconductor device including a temperature sensor includes a pull up circuit, a pull down circuit, a first additional current path, and a second additional current path. The pull up circuit is configured to generate a pull up current that contributes to generation of a first output current. The pull down circuit is operably coupled to the pull up circuit at an output node and configured to generate a pull down current that contributes to generation of a second output current. The first additional current path, when enabled, is configured to combine a first additional current with the pull up current to comprise the first output current. The second additional current path, when enabled, is configured to combine a second additional current with the pull down current to comprise the second output current. Respective enablement of the first additional current path and the second additional current path is complementary.
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