公开(公告)号：US20250132248A1

公开(公告)日：2025-04-24

申请号：US19005952

申请日：2024-12-30

Applicant: Micron Technology, Inc.

Inventor： David H. Wells ,  Richard J. Hill ,  Umberto M. Meotto ,  Matthew Thorum

IPC: H01L23/522 ,  G11C16/04 ,  H01L23/528 ,  H01L23/532 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.

公开(公告)号：US12237013B2

公开(公告)日：2025-02-25

申请号：US17372891

申请日：2021-07-12

Applicant: Micron Technology, Inc.

Inventor： Shyam Surthi ,  Matthew Thorum

IPC: H01L23/532 ,  G11C16/04 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: Some embodiments include an integrated assembly having a vertical stack of alternating first and second levels. A panel extends through the stack. The first levels have proximal regions adjacent the panel, and have distal regions further from the panel than the proximal regions. The distal regions include conductive structures. The conductive structures have a first thickness. The proximal regions include insulative structures. The insulative structures have a second thickness at least about as large as the first thickness. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20230011076A1

公开(公告)日：2023-01-12

申请号：US17372891

申请日：2021-07-12

Applicant: Micron Technology, Inc.

Inventor： Shyam Surthi ,  Matthew Thorum

IPC: G11C16/04 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/532

Abstract: Some embodiments include an integrated assembly having a vertical stack of alternating first and second levels. A panel extends through the stack. The first levels have proximal regions adjacent the panel, and have distal regions further from the panel than the proximal regions. The distal regions include conductive structures. The conductive structures have a first thickness. The proximal regions include insulative structures. The insulative structures have a second thickness at least about as large as the first thickness. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US11495610B2

公开(公告)日：2022-11-08

申请号：US16921641

申请日：2020-07-06

Applicant: Micron Technology, Inc.

Inventor： Collin Howder ,  Shyam Surthi ,  Matthew Thorum

IPC: H01L27/11556 ,  H01L27/11519 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11524

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. The second tiers comprise doped silicon dioxide and the first tiers comprise a material other than doped silicon dioxide. The stack comprises laterally-spaced memory-block regions. Channel-material-string constructions extend through the first tiers and the second tiers in the memory-block regions. The doped silicon dioxide that is in the second tiers is etched selectively relative to said other material that is in the first tiers and selectively relative to and to expose an undoped silicon dioxide-comprising string of a charge-blocking material that is part of individual of the channel-material-string constructions. Structure independent of method is disclosed.

公开(公告)号：US20210343728A1

公开(公告)日：2021-11-04

申请号：US16863000

申请日：2020-04-30

Applicant: Micron Technology, Inc.

Inventor： Shyam Surthi ,  Kunal Shrotri ,  Matthew Thorum

IPC: H01L27/1157 ,  H01L27/11524 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11582

Abstract: Some embodiments include an integrated assembly having a vertical stack of alternating insulative and conductive levels. The conductive levels have terminal regions and nonterminal regions. The terminal regions are vertically thicker than the nonterminal regions. Channel material extends vertically through the stack. Tunneling material is adjacent the channel material. Charge-storage material is adjacent the tunneling material. High-k dielectric material is between the charge-storage material and the terminal regions of the conductive levels. The insulative levels have carbon-containing first regions between the terminal regions of neighboring conductive levels, and have second regions between the nonterminal regions of the neighboring conductive levels. Some embodiments include methods of forming integrated assemblies.