公开(公告)号：US20240038322A1

公开(公告)日：2024-02-01

申请号：US17873991

申请日：2022-07-26

Applicant: Micron Technology, Inc.

Inventor： Michele Maria Venturini ,  Umberto Di Vincenzo ,  Ferdinando Bedeschi ,  Riccardo Muzzetto ,  Christophe Vincent Antoine Laurent ,  Christian Caillat

IPC: G11C29/50

CPC classification number: G11C29/50004 ,  G11C2029/5004

Abstract: Apparatuses, methods, and systems for performing sense operations in memory are disclosed. The memory can have a group of memory cells, and circuitry can be configured to perform a sense operation on the group, wherein performing the sense operation includes performing a first sense operation in a first polarity on the group of memory cells to determine a quantity of the memory cells of the group that are in a particular data state, and performing a second sense operation in a second polarity on the group of memory cells to determine a data state of the memory cells of the group. The second polarity is opposite the first polarity, and the second sense operation is a count-based sense operation that uses the determined quantity of memory cells in the particular data state as a counting threshold to determine the data state of the memory cells of the group.

公开(公告)号：US20230206979A1

公开(公告)日：2023-06-29

申请号：US17646261

申请日：2021-12-28

Applicant: Micron Technology, Inc.

Inventor： Umberto Di Vincenzo ,  Michele Maria Venturini

IPC: G11C11/22 ,  G11C16/04 ,  G11C16/28

CPC classification number: G11C11/2273 ,  G11C16/0483 ,  G11C16/28 ,  G11C11/221

Abstract: Methods, systems, and devices for sensing component with a common node are described. A set of sense circuits of a memory device may include a shared differential amplifier having a first branch for each sense circuit and a shared second branch, as well as a shared common node. A respective latch of each sense amplifier may be initialized to a second logic state, and the common node may undergo a voltage ramp to determine the state stored in the memory cell. If the memory cell stores the first logic state, the sense amplifier may couple with the common node to draw the current and switch the state of the latch to the first logic state. Alternatively, if the memory cell stores the second logic state the current may not be drawn and the state of the latch may not switch.