公开(公告)号：US20050212985A1

公开(公告)日：2005-09-29

申请号：US11090288

申请日：2005-03-28

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/1368 ,  G02F1/133 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G09F9/35 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： G02F1/136286 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

摘要： In a conventional manufacturing process where the number of manufacturing processes is reduced to form a semiconductor layer of a channel etch-type insulating gate-type transistor and source-drain wires in one photographic etching processing using half-tone exposure technology, the manufacturing margin is narrow, lowering the yield if the distance between the source and the drain wire shortens. A 4-mask process proposal needless of half-tone exposure technology is constructed by streamlining the formation of scan lines and pseudo-pixel electrodes at the same time, both comprising a laminate of a transparent conductive layer and a metal layer, and the formation of the transparent conductive pixel electrodes through removing the metal layers on the pseudo-pixel electrodes at the time of the formation of the opening in the passivation insulating layer, as well as by reducing the formation process of the opening through removing a gate insulating layer also at the formation of semiconductor layers for channel-etch type insulating gate transistors.

摘要翻译： 在使用半色调曝光技术的一次照相蚀刻处理中减少制造工艺数量以形成沟道蚀刻型绝缘栅型晶体管和源极 - 漏极导线的半导体层的传统制造工艺中，制造裕量为 如果源极和漏极之间的距离缩短，则会降低产量。 不需要半色调曝光技术的4掩模处理方案通过同时简化扫描线和伪像素电极的形成而构成，两者都包括透明导电层和金属层的层压体，并形成 透明导电像素电极，通过在钝化绝缘层中形成开口时去除伪像素电极上的金属层，以及通过在栅极绝缘层中去除栅极绝缘层来减小开口的形成过程 沟道蚀刻型绝缘栅晶体管的半导体层的形成。

公开(公告)号：US06424400B1

公开(公告)日：2002-07-23

申请号：US09673357

申请日：2000-11-30

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F11345

CPC分类号： H05K1/182 ,  G02F1/13452 ,  H05K1/142 ,  H05K3/368

摘要： A display panel capable of supplying necessary signals and power source at low resistance to a semiconductor integrated circuit chip mounted on a display panel is disclosed. Herein, electric signals are supplied to terminal electrodes of the scanning lines and signal lines by mounting a driving integrated circuit chip directly on the terminal electrode disposed on the active substrate. Further, electric connection to the driving integrated circuit chip is achieved by mounting a printed circuit board having a larger opening than the outside shape of the driving integrated circuit chip and forming wiring lines at the mounting position of the driving integrated circuit chip mounted on the active substrate and its vicinity, on outside of the image display region of the active substrate.

摘要翻译： 公开了一种能够以低电阻向安装在显示面板上的半导体集成电路芯片提供必要的信号和电源的显示面板。 这里，通过将驱动集成电路芯片直接安装在设置在有源基板上的端子电极上，将电信号提供给扫描线和信号线的端子电极。 此外，通过安装具有比驱动集成电路芯片的外部形状更大的开口的印刷电路板并且在安装在有源的驱动集成电路芯片的驱动集成电路芯片的安装位置处形成布线来实现与驱动集成电路芯片的电连接 基板及其附近，在有源基板的图像显示区域的外侧。

公开(公告)号：US5124823A

公开(公告)日：1992-06-23

申请号：US467548

申请日：1990-01-19

申请人： Kiyohiro Kawasaki ,  Hiroyoshi Takezawa

发明人： Kiyohiro Kawasaki ,  Hiroyoshi Takezawa

IPC分类号： G02F1/1333 ,  G02F1/1335 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368

CPC分类号： G02F1/1362 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514

摘要： A liquid crystal image display device comprising an insulating substrate having plural scanning lines and signal lines and a switching device and a pixel electrode provided for each of pixels, a light-transmissive insulating substrate having a transparent conductive counter electrode and liquid crystal filled between both substrates, wherein said signal lines or scanning lines for supplying electric signals to said switching devices and conductive paths for connecting said switching devices with the pixel electrodes are coated with an thick organic film so as to be electrically isolated from said liquid crystal.

公开(公告)号：US07982837B2

公开(公告)日：2011-07-19

申请号：US12902633

申请日：2010-10-12

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/1343

CPC分类号： G02F1/136286 ,  G02F1/134363 ,  G02F1/13458 ,  G02F1/136213 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L21/84 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

摘要： In a conventional manufacturing process where the number of manufacturing processes is reduced to form a semiconductor layer of a channel etch-type insulating gate-type transistor and source-drain wires in one photographic etching processing using half-tone exposure technology, the manufacturing margin is narrow, lowering the yield if the distance between the source and the drain wire shortens. A 4-mask process proposal needless of half-tone exposure technology is constructed by streamlining the formation of scan lines and pseudo-pixel electrodes at the same time, both comprising a laminate of a transparent conductive layer and a metal layer, and the formation of the transparent conductive pixel electrodes through removing the metal layers on the pseudo-pixel electrodes at the time of the formation of the opening in the passivation insulating layer, as well as by reducing the formation process of the opening through removing a gate insulating layer also at the formation of semiconductor layers for channel-etch type insulating gate transistors.

摘要翻译： 在使用半色调曝光技术的一次照相蚀刻处理中减少制造工艺数量以形成沟道蚀刻型绝缘栅型晶体管和源极 - 漏极导线的半导体层的传统制造工艺中，制造裕量为 如果源极和漏极之间的距离缩短，则会降低产量。 不需要半色调曝光技术的4掩模处理方案通过同时简化扫描线和伪像素电极的形成而构成，两者都包括透明导电层和金属层的层压体，并形成 透明导电像素电极，通过在钝化绝缘层中形成开口时去除伪像素电极上的金属层，以及通过在栅极绝缘层中去除栅极绝缘层来减小开口的形成过程 沟道蚀刻型绝缘栅晶体管的半导体层的形成。

公开(公告)号：US20070242178A1

公开(公告)日：2007-10-18

申请号：US11501008

申请日：2006-08-09

申请人： Kiyohiro Kawasaki ,  Jia-Tsung Lee ,  Chien-Hung Chen

发明人： Kiyohiro Kawasaki ,  Jia-Tsung Lee ,  Chien-Hung Chen

IPC分类号： G02F1/136

CPC分类号： G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2202/103

摘要： Development of 3-mask process to reduce the manufacturing cost of LCD-display device successively following 4-mask process. Opening formation process and pixel electrode formation process which is sequentially done following the opening formation process are treated with one photo-mask without using halftone exposure technology by forming source-drain wires comprising a low-resistance metal layer and a heat-resistant metal layer, the latter is capable of being removed with etching gas for etching gate insulating layer (and passivation insulating layer), giving protection means at least for the channel and the data line of the insulating gate transistor, forming openings in the insulating layers including the gate insulating layer with photosensitive resins having counter-taper cross sections, removing the exposed low-resistance metal in the openings, forming pixel electrode with the photosensitive resins as a lift-off material to lift off the conductive thin film for pixel electrode.

摘要翻译： 开发3掩模工艺，以降低LCD显示设备的制造成本，连续进行4掩模处理。 通过形成包含低电阻金属层和耐热金属层的源极 - 漏极线而不使用半色调曝光技术，用一个光掩模来处理在开口形成处理之后依次进行的开口形成处理和像素电极形成处理， 后者能够用用于蚀刻栅极绝缘层（和钝化绝缘层）的蚀刻气体去除，至少为绝缘栅极晶体管的沟道和数据线提供保护装置，在绝缘层中形成包括栅绝缘层的开口 层，其中具有相反锥形横截面的感光树脂，去除开口中暴露的低电阻金属，用感光树脂形成像素电极作为剥离材料以剥离像素电极用导电薄膜。

公开(公告)号：US20050212986A1

公开(公告)日：2005-09-29

申请号：US10963800

申请日：2004-10-14

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/1368 ,  G02F1/133 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  H01L21/336 ,  H01L29/786

CPC分类号： G02F1/136286 ,  G02F1/134363 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1288

摘要： A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drain wires or on the source wire (signal line), or by forming an anodized layer, which is an insulating layer, on source-drain wires.

摘要翻译： 构造了用于TN型液晶显示装置和IPS型液晶装置的四掩模处理和三掩模处理方案，其中通过简化扫描的形成不需要形成钝化绝缘层 线和伪像素元件，两者都包括由透明导电层和金属层制成的层压体，同时通过在该时间去除伪像素电极上的金属层形成透明导电像素电极 通过引入半色调曝光技术，通过使用一个光掩模简化接触的形成过程的处理和保护绝缘层的形成过程，并形成栅极绝缘层中的开口的形成 用于蚀刻停止型绝缘栅型晶体管的源极 - 漏极导线，其使用光敏有机绝缘层并留下感光有机绝缘层 源极 - 漏极导线或源极线（信号线）上不变，或者在源极 - 漏极导线上形成作为绝缘层的阳极氧化层。

公开(公告)号：US20050185126A1

公开(公告)日：2005-08-25

申请号：US10995418

申请日：2004-11-24

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

CPC分类号： G02F1/1368 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295

摘要： Four-mask and three-mask process for TN-type liquid crystal display made with combination of the formation process of the signal line and the formation process of the pixel electrode by forming a signal line of a laminate of a transparent conductive layer and a low-resistance metal layer and a pseudo-pixel electrode, removing a low resistance metal layer on the pseudo-pixel electrode during formation of an opening in a passivation insulating layer to obtain a pixel electrode having a transparent conductive layer. Contact formation process by removing the gate insulating layer during formation of the semiconductor layer, and the formation process of the contact and the formation process of the semiconductor layer, or the formation process of the scan line and the formation process of the contact or the formation process of the scan line and the formation process of the semiconductor layer by introducing half-tone exposure technology.

摘要翻译： 通过形成透明导电层和低透明导电层的层叠体的信号线，结合信号线的形成过程和像素电极的形成过程组合的TN型液晶显示器的四掩模和三掩模处理 电阻金属层和伪像素电极，在钝化绝缘层中形成开口期间去除伪像素电极上的低电阻金属层，以获得具有透明导电层的像素电极。 在形成半导体层期间去除栅极绝缘层的接触形成过程，以及半导体层的接触和形成过程的形成过程，或扫描线的形成过程以及接触或形成的形成过程 通过引入半色调曝光技术，扫描线的工艺和半导体层的形成过程。

公开(公告)号：US20050168667A1

公开(公告)日：2005-08-04

申请号：US11043948

申请日：2005-01-28

申请人： Kiyohiro Kawasaki ,  Ching-Lung Chiang

发明人： Kiyohiro Kawasaki ,  Ching-Lung Chiang

IPC分类号： G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G09F9/30 ,  H01L29/786

CPC分类号： G02F1/136286 ,  G02F2001/136295

摘要： In the 5-mask and 4-mask processes, during the formation of contacts, breakings in the pixel electrodes and unstable contacts that follow tend to occur. Using source-drain wires consisting of a lamination layer of a heat resistant metal layer and an aluminum layer, the undercuts of the passivation insulating layer formed by removing an aluminum layer in the openings on drain electrodes is resolved by adding manufacturing processes to enlarge the said openings.

摘要翻译： 在5掩模和4掩模过程中，在形成接触期间，容易发生像素电极和不稳定接触中的断裂。 使用由耐热金属层的层压层和铝层组成的源极 - 漏极线，通过添加制造工艺来解决通过去除漏电极上的开口中的铝层而形成的钝化绝缘层的底切，以扩大所述 开口

公开(公告)号：US08681307B2

公开(公告)日：2014-03-25

申请号：US13133212

申请日：2009-12-16

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/13 ,  G02F1/136 ,  G02F1/1333 ,  H01L21/00 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L29/4908 ,  G02F1/136213 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/458

摘要： According to the insulated gate transistor, a gate electrode (11A) is provided on a main surface of a glass substrate (2); a first part of an insulating layer (gate insulating layer (30) and transparent inorganic insulating layer (60)) is thicker than a second part of the insulating layer (gate insulating layer (30)), the first part being between (i) the gate electrode (11A) and (ii) a source electrode (12) and a drain electrode (21) of the insulated gate transistor, and the second part being between (i) the gate electrode (11A) and (ii) a channel section (31A) of the insulated gate transistor. This makes it possible to reduce parasitic capacitor without deteriorating characteristics of the transistor.

摘要翻译： 根据绝缘栅晶体管，在玻璃基板（2）的主表面上设置栅电极（11A） 绝缘层（栅极绝缘层（30）和透明无机绝缘层（60））的第一部分比绝缘层（栅极绝缘层（30））的第二部分更厚，第一部分在（i） 栅电极（11A）和（ii）绝缘栅晶体管的源电极（12）和漏电极（21），第二部分位于（i）栅电极（11A）和（ii）沟道 绝缘栅晶体管的部分（31A）。 这使得可以减小寄生电容而不降低晶体管的特性。

公开(公告)号：US08334939B2

公开(公告)日：2012-12-18

申请号：US13026644

申请日：2011-02-14

申请人： Kiyohiro Kawasaki

发明人： Kiyohiro Kawasaki

IPC分类号： G02F1/136

CPC分类号： G02F1/136286 ,  G02F1/134363 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1288

摘要： A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drain wires or on the source wire (signal line), or by forming an anodized layer, which is an insulating layer, on source-drain wires.

摘要翻译： 构造了用于TN型液晶显示装置和IPS型液晶装置的四掩模处理和三掩模处理方案，其中通过简化扫描的形成不需要形成钝化绝缘层 线和伪像素元件，两者都包括由透明导电层和金属层制成的层压体，同时通过在该时间去除伪像素电极上的金属层形成透明导电像素电极 通过引入半色调曝光技术，通过使用一个光掩模简化接触的形成过程的处理和保护绝缘层的形成过程，并形成栅极绝缘层中的开口的形成 用于蚀刻停止型绝缘栅型晶体管的源极 - 漏极导线，其使用光敏有机绝缘层并留下感光有机绝缘层 源极 - 漏极导线或源极线（信号线）上不变，或者在源极 - 漏极导线上形成作为绝缘层的阳极氧化层。