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    Method and system for stacking printed circuit board
    1.
    发明授权
    Method and system for stacking printed circuit board 有权

    公开(公告)号：US12035474B2

    公开(公告)日：2024-07-09

    申请号：US17544766

    申请日：2021-12-07

    申请人： Chiun Mai Communication Systems, Inc.

    发明人： Chi-Yi Liao ,  Yen-Chung Huang ,  Wen-Yu Wang

    IPC分类号： H05K1/14 ,  B23K1/00 ,  H05K3/36

    CPC分类号： H05K1/144 ,  B23K1/0016 ,  H05K3/368

    摘要： A method and a system for stacking printed circuit boards includes providing a lower baseboard, a pinboard, and an upper baseboard; printing a first solder paste on the lower baseboard; placing a placement component on the lower baseboard; placing the pinboard on the lower baseboard; reflow soldering the lower baseboard with the placement component and the pinboard and forming a first assembly; printing the first solder paste and a second solder paste on the upper baseboard; placing the placement component on the upper baseboard and the first assembly on the upper baseboard; and reflow soldering the upper baseboard with the placement component and the first assembly and forming a printed circuit board; a melting point of the first solder paste is higher than a melting point of the second solder paste.

    ELECTRONIC MODULE, INTERMEDIATE CONNECTION MEMBER, AND ELECTRONIC DEVICE
    6.
    发明公开
    ELECTRONIC MODULE, INTERMEDIATE CONNECTION MEMBER, AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20230223713A1

    公开(公告)日：2023-07-13

    申请号：US18148443

    申请日：2022-12-30

    申请人： CANON KABUSHIKI KAISHA

    发明人： MITSUTOSHI HASEGAWA ,  NORITAKE TSUBOI ,  SATORU HIGUCHI

    IPC分类号： H01R12/52 ,  H05K3/36 ,  H05K1/11 ,  H05K3/34

    CPC分类号： H01R12/52 ,  H05K3/368 ,  H05K1/111 ,  H05K3/3442 ,  H05K1/144

    摘要： An electronic module includes a first wiring board, a second wiring board, and an intermediate connection member. The intermediate connection member includes an insulator, a plurality of first wirings supported by the insulator and arranged at intervals in a second direction intersecting a first direction, a plurality of second wirings supported by the insulator and arranged at intervals in the second direction, and a metal layer supported by the insulator and interposed between the plurality of first wirings and the plurality of second wirings so as to oppose the plurality of first wirings and the plurality of second wirings in a third direction intersecting the first direction and the second direction. A part of the metal layer sandwiched in the insulator is bonded to one of the first wiring board or the second wiring board by a conductive first bonding member.

    HYBRID INTEGRATION METHOD
    8.
    发明公开
    HYBRID INTEGRATION METHOD 审中-公开

    公开(公告)号：US20230141467A1

    公开(公告)日：2023-05-11

    申请号：US17680267

    申请日：2022-02-24

    申请人： Huazhong University of Science and Technology

    发明人： Weihua GUO ,  Xiangyang DAI ,  Qiaoyin LU

    IPC分类号： G02B6/13 ,  G02B6/122 ,  H05K1/14 ,  H05K3/36

    CPC分类号： G02B6/13 ,  G02B6/1228 ,  H05K1/144 ,  H05K3/368 ,  H05K2201/041

    摘要： A hybrid integration method includes: assembling a motherboard chip, assembling a daughterboard chip, and assembling an integrated chip. The motherboard chip includes a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region arranged on the motherboard chip body, and the first waveguide region includes a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other; the daughterboard chip includes a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region arranged on the daughterboard chip body, and the second waveguide region includes a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other.