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    Hybrid allocation of data lines in a streaming cache memory
    14.
    发明授权
    Hybrid allocation of data lines in a streaming cache memory 有权

    公开(公告)号：US11934311B2

    公开(公告)日：2024-03-19

    申请号：US17736557

    申请日：2022-05-04

    Applicant: NVIDIA CORPORATION

    Inventor： Michael Fetterman ,  Steven James Heinrich ,  Shirish Gadre

    IPC: G06F12/00 ,  G06F9/38 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0877

    CPC classification number: G06F12/0811 ,  G06F9/3816 ,  G06F12/084 ,  G06F12/0877

    Abstract: Various embodiments include a system for managing cache memory in a computing system. The system includes a sectored cache memory that provides a mechanism for sharing sectors in a cache line among multiple cache line allocations. Traditionally, different cache line allocations are assigned to different cache lines in the cache memory. Further, cache line allocations may not use all of the sectors of the cache line, leading to low utilization of the cache memory. With the present techniques, multiple cache lines share the same cache line, leading to improved cache memory utilization relative to prior techniques. Further, sectors of cache allocations can be assigned to reduce data bank conflicts when accessing cache memory. Reducing such data bank conflicts can result in improved memory access performance, even when cache lines are shared with multiple allocations.

    TECHNIQUES FOR ACCESSING AND UTILIZING COMPRESSED DATA AND ITS STATE INFORMATION
    15.
    发明申请
    TECHNIQUES FOR ACCESSING AND UTILIZING COMPRESSED DATA AND ITS STATE INFORMATION 有权

    公开(公告)号：US20210373774A1

    公开(公告)日：2021-12-02

    申请号：US16888116

    申请日：2020-05-29

    Applicant: NVIDIA Corporation

    Inventor： Ram Rangan ,  Patrick Richard Brown ,  Wishwesh Anil Gandhi ,  Steven James Heinrich ,  Mathias Heyer ,  Emmett Michael Kilgariff ,  Praveen Krishnamurthy ,  Dong Han Ryu

    IPC: G06F3/06 ,  H03M7/30

    Abstract: Some systems compress data utilized by a user mode software without the user mode software being aware of any compression taking place. To maintain that illusion, such systems prevent user mode software from being aware of and/or accessing the underlying compressed states of the data. While such an approach protects proprietary compression techniques used in such systems from being deciphered, such restrictions limit the ability of user mode software to use the underlying compressed forms of the data in new ways. Disclosed herein are various techniques for allowing user-mode software to access the underlying compressed states of data either directly or indirectly. Such techniques can be used, for example, to allow various user-mode software on a single system or on multiple systems to exchange data in the underlying compression format of the system(s) even when the user mode software is unable to decipher the compression format.

    COALESCING TEXTURE ACCESS AND LOAD/STORE OPERATIONS
    17.
    发明申请
    COALESCING TEXTURE ACCESS AND LOAD/STORE OPERATIONS 有权
    COALESCING纹理访问和负载/存储操作

    公开(公告)号：US20150046662A1

    公开(公告)日：2015-02-12

    申请号：US13960719

    申请日：2013-08-06

    Applicant: NVIDIA Corporation

    Inventor： Steven James Heinrich ,  Ramesh Jandhyala ,  Bengt-Olaf Schneider

    IPC: G06F9/30 ,  G06F13/16

    CPC classification number: G06F13/1621 ,  G06F12/00 ,  G06F13/1626 ,  Y02D10/14

    Abstract: A system, method, and computer program product are provided for coalescing memory access requests. A plurality of memory access requests is received in a thread execution order and a portion of the memory access requests are coalesced into memory order, where memory access requests included in the portion are generated by threads in a thread block. A memory operation is generated that is transmitted to a memory system, where the memory operation represents the coalesced portion of memory access requests.

    Abstract translation: 提供了系统，方法和计算机程序产品，用于合并存储器访问请求。 以线程执行顺序接收多个存储器访问请求，并且存储器访问请求的一部分被合并到存储器顺序中，其中包括在该部分中的存储器访问请求由线程块中的线程生成。 产生存储器操作，其被传送到存储器系统，其中存储器操作表示存储器访问请求的合并部分。

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