公开(公告)号：US20140071106A1

公开(公告)日：2014-03-13

申请号：US13677314

申请日：2012-11-15

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G09G1/00

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data from the timing controller via a data bus, converts the first pixel data to a first drive voltage according to a first reference voltage group, and drives a display panel by the first drive voltage. The voltage controller receives a voltage command from the timing controller, generates and changes a first reference voltage configuration data according to the voltage command. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data to generate and adjust the first reference voltage group for applying to the first drive channel circuit. Furthermore, a method for updating a new gamma curve by the source driver is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路经由数据总线从定时控制器接收第一像素数据，根据第一参考电压组将第一像素数据转换为第一驱动电压，并且通过第一驱动电压驱动显示面板。 电压控制器从定时控制器接收电压指令，根据电压指令产生并改变第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收第一参考电压配置数据以产生和调整第一参考电压组以施加到第一驱动通道电路。 此外，还提供了用于由源驱动器更新新伽玛曲线的方法。

公开(公告)号：US11069586B2

公开(公告)日：2021-07-20

申请号：US14968929

申请日：2015-12-15

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Chun-Yung Cho ,  Po-Yu Tseng

IPC: H01L23/495 ,  H01L21/66 ,  H01L23/498

Abstract: A chip-on-film package including a flexible substrate, first test pads, second test pads, first connecting wires, second connecting wires and a chip is provided. The flexible substrate includes at least one segment. Each segment has a central portion and a first side portion and a second side portion located at two opposite sides of the central portion. The chip disposed on the central portion includes first connecting pads and second connecting pads. The first test pads and the second test pads are disposed on the first side portion. Two ends of each of the first connecting wires are connected to the corresponding first connecting pad and the corresponding first test pad. Two ends of each of the second connecting wires are connected to the corresponding second connecting pad and the corresponding second test pad. Each of the second connecting wires includes a first section located at the second side portion.

公开(公告)号：US20200020283A1

公开(公告)日：2020-01-16

申请号：US16512414

申请日：2019-07-16

Applicant: Novatek Microelectronics Corp.

Inventor： Chih-Hsien Chou ,  Po-Yu Tseng ,  Jhih-Siou Cheng ,  Jin-Yi Lin

IPC: G09G3/3291

Abstract: A source driver including a sensing circuit and an operational amplifier is provided. The sensing circuit senses pixel information of an organic light-emitting diode (OLED) pixel circuit. The operational amplifier includes an amplifier circuit and an offset voltage storing and reducing circuit. An input terminal of the amplifier circuit is coupled to the sensing circuit. The amplifier circuit includes a first gain circuit and a second gain circuit. An output terminal of the offset voltage storing and reducing circuit is coupled to a coupling terminal of the first gain circuit. An input terminal of the offset voltage storing and reducing circuit is coupled to an output terminal of the second gain circuit. The offset voltage storing and reducing circuit stores and reduces an offset voltage of the first gain circuit.

公开(公告)号：US20170092572A1

公开(公告)日：2017-03-30

申请号：US14968929

申请日：2015-12-15

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Chun-Yung Cho ,  Po-Yu Tseng

IPC: H01L23/495 ,  H01L21/66

CPC classification number: H01L22/32 ,  H01L23/49838 ,  H01L23/4985

Abstract: A chip-on-film package including a flexible substrate, first test pads, second test pads, first connecting wires, second connecting wires and a chip is provided. The flexible substrate includes at least one segment. Each segment has a central portion and a first side portion and a second side portion located at two opposite sides of the central portion. The chip disposed on the central portion includes first connecting pads and second connecting pads. The first test pads and the second test pads are disposed on the first side portion. Two ends of each of the first connecting wires are connected to the corresponding first connecting pad and the corresponding first test pad. Two ends of each of the second connecting wires are connected to the corresponding second connecting pad and the corresponding second test pad. Each of the second connecting wires includes a first section located at the second side portion.

公开(公告)号：US20160372018A1

公开(公告)日：2016-12-22

申请号：US15256753

申请日：2016-09-06

Applicant: Novatek Microelectronics Corp.

Inventor： Po-Yu Tseng ,  Jhih-Siou Cheng ,  Pang-Chen Hung

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2330/025 ,  G09G2330/045

Abstract: A driving device is provided. The driving device includes a first code mapping circuit, a first source driving channel, a second code mapping circuit and a second source driving channel. The first code mapping circuit converts a first input code in input data into a first intermediate code according to a first code-to-code mapping relation. The first source driving channel converts the first intermediate code into a first analog voltage according to a first code-to-voltage mapping relation. The second code mapping circuit converts a second input code in the input data into a second intennediate code according to a second code-to-code mapping relation which is different from the first code-to-code mapping relation. The second source driving channel converts the second intermediate code into a second analog voltage according to a second code-to-voltage mapping relation which is different from the first code-to-voltage mapping relation.

Abstract translation: 提供驱动装置。 驱动装置包括第一码映射电路，第一源驱动信道，第二码映射电路和第二源驱动信道。 第一代码映射电路根据第一代码映射关系将输入数据中的第一输入代码转换为第一中间代码。 第一源驱动通道根据第一代码电压映射关系将第一中间代码转换成第一模拟电压。 第二代码映射电路根据与第一代码到代码映射关系不同的第二代码到代码映射关系将输入数据中的第二输入代码转换成第二内部代码。 第二源极驱动通道根据与第一代码电压映射关系不同的第二代码到电压映射关系将第二中间代码转换成第二模拟电压。

公开(公告)号：US20160284297A1

公开(公告)日：2016-09-29

申请号：US14669003

申请日：2015-03-26

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Po-Hsiang Fang ,  Chieh-An Lin ,  Po-Yu Tseng ,  Ju-Lin Huang ,  Yi-Chuan Liu

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A source driver apparatus and an operating method thereof are provided. The source driver apparatus can drive a plurality of source lines of a display panel, wherein the display panel further comprising a gate driver apparatus. The source driver apparatus includes driving channels and a delay control circuit. The driving channels output source driving signals. The delay control circuit controls the driving channels to change delay times of the source driving signals within the same period, such that the delay times of the source driving signals respectively correspond to distances from the source lines to the gate driver apparatus.

Abstract translation: 提供源驱动器装置及其操作方法。 源极驱动器装置可以驱动显示面板的多个源极线，其中显示面板还包括栅极驱动器装置。 源极驱动器装置包括驱动通道和延迟控制电路。 驱动通道输出源驱动信号。 延迟控制电路控制驱动信道以改变在相同周期内的源极驱动信号的延迟时间，使得源极驱动信号的延迟时间分别对应于从源极线到栅极驱动器装置的距离。

公开(公告)号：US20150084947A1

公开(公告)日：2015-03-26

申请号：US14561200

申请日：2014-12-04

Applicant: Novatek Microelectronics Corp.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路接收第一像素数据和第一参考电压组，用于驱动显示装置。 电压控制器在行数据发送期间，水平消隐期间或垂直消隐期间接收电压指令，以产生第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收用于将第一参考电压组施加到第一驱动通道电路的第一参考电压配置数据。 此外，还提供了一种用于驱动显示装置的方法。

公开(公告)号：US20140049524A1

公开(公告)日：2014-02-20

申请号：US13778122

申请日：2013-02-27

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su ,  Po-Yu Tseng ,  Po-Hsiang Fang ,  Hsin-Hung Lee

IPC: G09G3/00

CPC classification number: G09G3/006 ,  G09G3/3688 ,  G09G2330/12 ,  G09G2370/08

Abstract: A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Abstract translation: 提供了一种用于显示显示器的数据通道的错误率的方法。 显示器的定时控制器经由显示器的第一和第二数据通道重复地将特定格式的测试信号发送到显示器的第一和第二源驱动器。 在测试期间，分别计数第一源驱动器和第二源驱动器的第一次数和第二次数，以确定所接收的测试信号不具有特定格式。 第一和第二源驱动器分别根据计数的第一和第二次数来分别显示显示器的面板的第一区域和第二区域。 因此，数据通道的错误率以更容易识别错误率的方式呈现在显示器的面板上。

公开(公告)号：US20140009450A1

公开(公告)日：2014-01-09

申请号：US13935546

申请日：2013-07-04

Applicant: NOVATEK Microelectronics Corp.

Inventor： Chia-Wei Su ,  Shun-Hsun Yang ,  Hsin-Hung Lee ,  Po-Hsiang Fang ,  Po-Yu Tseng ,  Li-Tang Lin

IPC: G09G5/00

CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0281 ,  G09G2310/0297

Abstract: A flat panel display with multi-drop interfaces is disclosed. The flat panel display with multi-drop interfaces includes a plurality of driver chips having a plurality of respective hardware setting values via a hardware setting, and a timing controller for transmitting at least one signal to the plurality of driver chips via at least one multi-drop interface, wherein the timing controller and a specific driver chip among the plurality of driver chips negotiate with each other according to a corresponding specific respective hardware setting value among the plurality of respective hardware setting values.

Abstract translation: 公开了具有多点接口的平板显示器。 具有多点接口的平板显示器包括经由硬件设置具有多个相应的硬件设置值的多个驱动器芯片，以及定时控制器，用于经由至少一个多点接口将至少一个信号发送到多个驱动器芯片， 其中所述定时控制器和所述多个驱动器芯片中的特定驱动器芯片根据所述多个相应硬件设置值中的对应的特定相应的硬件设置值来彼此协商。

公开(公告)号：US10789895B2

公开(公告)日：2020-09-29

申请号：US16009290

申请日：2018-06-15

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chih-Hsien Chou ,  Po-Yu Tseng ,  Jhih-Siou Cheng

IPC: G09G3/36 ,  G09G3/3283 ,  H03F3/45

Abstract: The differential difference amplifier circuit includes a differential input stage circuit, a loading stage circuit coupled to the differential input stage circuit, and an output stage circuit coupled to the loading stage circuit. The output stage circuit is configured to generate an output signal. The differential input stage circuit includes a first differential pair having a first transconductance and a second differential pair having a second transconductance. The first differential pair is biased by a first current source and receives a first input signal and the output signal. The second differential pair is biased by a second current source and receives a second input signal and the output signal. At least one of the first transconductance and the second transconductance is adjusted according to the image data.