公开(公告)号：US09311844B2

公开(公告)日：2016-04-12

申请号：US14083446

申请日：2013-11-19

Applicant: Novatek Microelectronics Corp.

Inventor： Shun-Hsun Yang

IPC: G09G3/22

CPC classification number: G09G3/22 ,  G09G3/20 ,  G09G3/3275 ,  G09G3/3685 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2330/025 ,  G09G2340/16

Abstract: A source driver and a method to reduce peak current of the source driver are provided. The source driver includes a latch circuit, a level shifter and a digital-to-analog converter (DAC) circuit. The latch circuit latches current bit-data. The latch circuit is coupled to an input terminal of the level shifter. The DAC circuit is coupled to an output terminal of the level shifter. When the current bit-data is not a complement of previous bit-data, the latch circuit selects and outputs the current bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the output data of the level shifter. When the current bit-data is the complement of the previous bit-data, the latch circuit selects and outputs the previous bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the current bit-data.

Abstract translation: 提供源驱动器和减少源驱动器峰值电流的方法。 源极驱动器包括锁存电路，电平转换器和数模转换器（DAC）电路。 锁存电路锁存当前位数据。 锁存电路耦合到电平移位器的输入端。 DAC电路耦合到电平转换器的输出端。 当当前位数据不是先前位数据的补码时，锁存电路选择并将当前位数据输出到电平移位器的输入端，DAC电路输出对应于电平移位器的输出数据的电压 电平转换器。 当前位数据是前一位数据的补码时，锁存电路选择并输出前一位数据至电平移位器的输入端，DAC电路输出与当前位数据相对应的电压 。

公开(公告)号：US20150084947A1

公开(公告)日：2015-03-26

申请号：US14561200

申请日：2014-12-04

Applicant: Novatek Microelectronics Corp.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路接收第一像素数据和第一参考电压组，用于驱动显示装置。 电压控制器在行数据发送期间，水平消隐期间或垂直消隐期间接收电压指令，以产生第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收用于将第一参考电压组施加到第一驱动通道电路的第一参考电压配置数据。 此外，还提供了一种用于驱动显示装置的方法。

公开(公告)号：US08922535B2

公开(公告)日：2014-12-30

申请号：US13845080

申请日：2013-03-17

Applicant: Novatek Microelectronics Corp.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su

IPC: G09G5/00

CPC classification number: G09G5/00 ,  G09G3/20 ,  G09G5/18 ,  G09G2330/06 ,  G09G2370/08

Abstract: A timing controller is provided. The timing controller includes a timing control circuit, a first scrambler and a second scrambler. The timing control circuit provides first source driving data and second source driving data. The first scrambler scrambles the first source driving data according to a first random number to generate first scrambled data. The second scrambler scrambles the second driving source data according to a second random number to generate second scrambled data. The second random number is different from the first random number.

Abstract translation: 提供了时序控制器。 定时控制器包括定时控制电路，第一扰频器和第二加扰器。 定时控制电路提供第一源驱动数据和第二源驱动数据。 第一加扰器根据第一随机数对第一源驱动数据进行加扰，以产生第一加扰数据。 第二加扰器根据第二随机数对第二驱动源数据进行加扰，以产生第二加扰数据。 第二个随机数与第一个随机数不同。

公开(公告)号：US20140368553A1

公开(公告)日：2014-12-18

申请号：US14018406

申请日：2013-09-04

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Sou-Chieh Chang ,  Shun-Hsun Yang ,  Tse-Hung Wu

IPC: G09G3/20

CPC classification number: G09G3/3614

Abstract: A source driver apparatus configured to drive a display panel is provided. The source driver apparatus includes a data operation circuit and a pixel driving circuit. The data operation circuit is configured to receive pixel data and perform a polarity determination operation on the pixel data to determine a polarity distribution information of pixels on the display panel. The pixel driving circuit is coupled to the data operation circuit. The pixel driving circuit is configured to drive the display panel according to the pixel data and the polarity distribution information. Furthermore, a driving method of the display panel is also provided.

Abstract translation: 提供了构造成驱动显示面板的源驱动器装置。 源极驱动器装置包括数据运算电路和像素驱动电路。 数据运算电路被配置为接收像素数据并对像素数据执行极性确定操作，以确定显示面板上的像素的极性分布信息。 像素驱动电路耦合到数据运算电路。 像素驱动电路被配置为根据像素数据和极性分布信息来驱动显示面板。 此外，还提供了显示面板的驱动方法。

公开(公告)号：US20140049524A1

公开(公告)日：2014-02-20

申请号：US13778122

申请日：2013-02-27

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su ,  Po-Yu Tseng ,  Po-Hsiang Fang ,  Hsin-Hung Lee

IPC: G09G3/00

CPC classification number: G09G3/006 ,  G09G3/3688 ,  G09G2330/12 ,  G09G2370/08

Abstract: A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Abstract translation: 提供了一种用于显示显示器的数据通道的错误率的方法。 显示器的定时控制器经由显示器的第一和第二数据通道重复地将特定格式的测试信号发送到显示器的第一和第二源驱动器。 在测试期间，分别计数第一源驱动器和第二源驱动器的第一次数和第二次数，以确定所接收的测试信号不具有特定格式。 第一和第二源驱动器分别根据计数的第一和第二次数来分别显示显示器的面板的第一区域和第二区域。 因此，数据通道的错误率以更容易识别错误率的方式呈现在显示器的面板上。

公开(公告)号：US20140009450A1

公开(公告)日：2014-01-09

申请号：US13935546

申请日：2013-07-04

Applicant: NOVATEK Microelectronics Corp.

Inventor： Chia-Wei Su ,  Shun-Hsun Yang ,  Hsin-Hung Lee ,  Po-Hsiang Fang ,  Po-Yu Tseng ,  Li-Tang Lin

IPC: G09G5/00

CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0281 ,  G09G2310/0297

Abstract: A flat panel display with multi-drop interfaces is disclosed. The flat panel display with multi-drop interfaces includes a plurality of driver chips having a plurality of respective hardware setting values via a hardware setting, and a timing controller for transmitting at least one signal to the plurality of driver chips via at least one multi-drop interface, wherein the timing controller and a specific driver chip among the plurality of driver chips negotiate with each other according to a corresponding specific respective hardware setting value among the plurality of respective hardware setting values.

Abstract translation: 公开了具有多点接口的平板显示器。 具有多点接口的平板显示器包括经由硬件设置具有多个相应的硬件设置值的多个驱动器芯片，以及定时控制器，用于经由至少一个多点接口将至少一个信号发送到多个驱动器芯片， 其中所述定时控制器和所述多个驱动器芯片中的特定驱动器芯片根据所述多个相应硬件设置值中的对应的特定相应的硬件设置值来彼此协商。

公开(公告)号：US10089941B2

公开(公告)日：2018-10-02

申请号：US15884398

申请日：2018-01-31

Applicant: Novatek Microelectronics Corp.

Inventor： Ching-Wen Hou ,  Shun-Hsun Yang ,  Tse-Hung Wu

IPC: G09G3/36

Abstract: A liquid crystal display apparatus, a source driver, and a method for controlling polarity of driving signals thereof are provided. The source driver includes a signal receiving interface, a decoder, and a controller. The signal receiving interface receives an image data stream or an indication signal. The decoder obtains controlling information from the image data stream or the indication signal. The controller receives the controlling information and decides a plurality of source driving signals generated by the source driver according to the controlling information.

公开(公告)号：US09916797B2

公开(公告)日：2018-03-13

申请号：US14716890

申请日：2015-05-20

Applicant: Novatek Microelectronics Corp.

Inventor： Ching-Wen Hou ,  Shun-Hsun Yang ,  Tse-Hung Wu

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2370/08 ,  G09G2370/14

Abstract: A liquid crystal display apparatus, a source driver, and a method for controlling polarity of driving signals thereof are provided. The source driver includes a signal receiving interface, a decoder, and a controller. The signal receiving interface receives an image data stream or a data input/output indication signal. The decoder obtains polarity controlling information from the image data stream or the data input/output indication signal. The controller receives the polarity controlling information and decides driving polarities of a plurality of source driving signals generated by the source driver according to the polarity controlling information.

公开(公告)号：US09396695B2

公开(公告)日：2016-07-19

申请号：US14561200

申请日：2014-12-04

Applicant: Novatek Microelectronics Corp.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G09G3/36 ,  G09G1/00

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路接收第一像素数据和第一参考电压组，用于驱动显示装置。 电压控制器在行数据发送期间，水平消隐期间或垂直消隐期间接收电压指令，以产生第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收用于将第一参考电压组施加到第一驱动通道电路的第一参考电压配置数据。 此外，还提供了一种用于驱动显示装置的方法。

公开(公告)号：US09299285B2

公开(公告)日：2016-03-29

申请号：US14010502

申请日：2013-08-26

Applicant: NOVATEK Microelectronics Corp.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/2096

Abstract: A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.

Abstract translation: 一种对应于多个源驱动装置的定时控制装置的定时加扰方法，包括根据时钟信号调整选择信号; 根据选择信号选择多个扰频产生单元之一以产生定时加扰信号; 以及根据所述定时加扰信号产生所述多个源驱动装置的加扰数据。