Three-level buck converter configurable for two-level buck converter mode operation

    公开(公告)号:US11831241B2

    公开(公告)日:2023-11-28

    申请号:US17363948

    申请日:2021-06-30

    CPC classification number: H02M3/1582 H02M3/07

    Abstract: A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

    UNIVERSAL SERIAL BUS (USB) TYPE-C AND POWER DELIVERY PORT WITH SCALABLE POWER ARCHITECTURE

    公开(公告)号:US20210382535A1

    公开(公告)日:2021-12-09

    申请号:US17445324

    申请日:2021-08-18

    Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

    Error correction for average current sensing in a switching regulator

    公开(公告)号:US10270342B2

    公开(公告)日:2019-04-23

    申请号:US15973787

    申请日:2018-05-08

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for current sensing and error correction, or at least adjustment, for a switching regulator. One example current-sensing circuit generally includes a first amplifier, a buffer, a low-pass filter, a first switch coupled between an output of the first amplifier and an input of the buffer, a second switch coupled between the output of the first amplifier and an input of the low-pass filter, a third switch coupled between an output of the buffer and the input of the low-pass filter, and a fourth switch coupled between the input of the low-pass filter and a reference node for the circuit.

    Adaptive combination power supply circuit and charging architecture

    公开(公告)号:US11606032B2

    公开(公告)日:2023-03-14

    申请号:US16683913

    申请日:2019-11-14

    Abstract: Certain aspects of the present disclosure generally relate to an adaptive combination power supply circuit. The adaptive combination power supply circuit may be capable of switching between performing as a three-level buck converter and as a divide-by-two charge pump. One example power supply circuit generally includes a first transistor; a second transistor coupled to the first transistor via a first node; a third transistor coupled to the second transistor via a second node; a fourth transistor coupled to the third transistor via a third node; a capacitive element having a first terminal coupled to the first node and a second terminal coupled to the third node; an inductive element having a first terminal coupled to the second node; and a switch having a first terminal coupled to the first terminal of the inductive element, the switch having a second terminal coupled to a second terminal of the inductive element.

    Constant gate-to-source-volt age-driving driver architecture for switched-mode power supplies

    公开(公告)号:US11502599B2

    公开(公告)日:2022-11-15

    申请号:US17021614

    申请日:2020-09-15

    Abstract: Techniques and apparatus for supplying power to gate drivers of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a SMPS circuit having a first input voltage node and a second input voltage node, and a charge pump. The charge pump generally includes a first capacitive element having a first terminal and a second terminal; a first switch coupled between a first input node of the charge pump and the first terminal of the first capacitive element; a second switch coupled between the second terminal of the first capacitive element and a second input node of the charge pump; a third switch coupled between the first terminal of the first capacitive element and the first input voltage node of the SMPS circuit; and a fourth switch coupled between the second terminal of the first capacitive element and the second input voltage node of the SMPS circuit.

    High-Efficiency Low-Ripple Burst Mode for a Charge Pump

    公开(公告)号:US20210376719A1

    公开(公告)日:2021-12-02

    申请号:US17334642

    申请日:2021-05-28

    Abstract: An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.

    Universal serial bus (USB) type-C and power delivery port with scalable power architecture

    公开(公告)号:US11112844B2

    公开(公告)日:2021-09-07

    申请号:US15649939

    申请日:2017-07-14

    Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

    Lossless average input and output current sensing in a switched-mode power supply

    公开(公告)号:US10756614B2

    公开(公告)日:2020-08-25

    申请号:US16004536

    申请日:2018-06-11

    Abstract: Methods and apparatus for current sensing and error correction in a switched-mode power supply composed of a high-side transistor coupled to a low-side transistor are described. One example method generally includes capturing a current associated with the low-side transistor at a first time corresponding to the low-side transistor turning off; capturing a current associated with the high-side transistor at a second time corresponding to a first delay after the high-side transistor turns on; capturing the current associated with the high-side transistor at a third time corresponding to the high-side transistor turning off; and applying a first correction current to a current-summing node of the current-sensing circuit for a first interval based on the first delay, wherein the first correction current is based on the captured current associated with the low-side transistor at the first time and on the captured current associated with the high-side transistor at the second time.

    Power-up sequencing and high voltage protection for charge pump converters

    公开(公告)号:US10734891B2

    公开(公告)日:2020-08-04

    申请号:US16001073

    申请日:2018-06-06

    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.

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