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公开(公告)号：US20160276932A1
公开(公告)日：2016-09-22
申请号：US14793147
申请日：2015-07-07
Applicant: QUALCOMM Incorporated
Inventor： Stuart Pullen , William Rader
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M1/088 , H02M3/1588 , H02M2001/0032 , H02M2001/0054 , Y02B70/1466 , Y02B70/1491 , Y02B70/16
Abstract: In one embodiment, a method receives a shed comparison signal that is based on a comparison of a voltage detected from a voltage converter to a reference voltage and receives a zero cross signal that indicates whether a current from the voltage converter has crossed zero. The shed comparison signal is sampled for a first number of clock cycles to generate shed comparison sampled values. Also, the zero cross signal is sampled for a second number of clock cycles to generate zero cross sampled values where the second number of clock cycles are less than the first number of clock cycles. The method determines a change between a shed state and an unshed state based on the shed comparison sampled values for the first number of clock cycles or the zero cross sampled values for the second number of clock cycles.
Abstract translation: 在一个实施例中，一种方法接收基于从电压转换器检测到的电压与参考电压的比较的减法比较信号，并接收指示来自电压转换器的电流是否已经超过零的零交叉信号。 针对第一数量的时钟周期采样梭口比较信号以产生舍入比较采样值。 而且，零交叉信号被采样第二数量的时钟周期以产生零交叉采样值，其中第二数量的时钟周期小于第一数量的时钟周期。 该方法基于第一数量的时钟周期的舍弃比较采样值或第二数量的时钟周期的零交叉采样值来确定切换状态和未发送状态之间的变化。
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公开(公告)号：US10734891B2
公开(公告)日：2020-08-04
申请号：US16001073
申请日：2018-06-06
Applicant: QUALCOMM Incorporated
Inventor： Hector Ivan Oporta , Zhaohui Zhu , Chunping Song , William Rader
Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for powering up a charge pump converter and providing protection and soft-start circuitry therefor. One example charge pump converter generally includes a first transistor and a second transistor coupled in series between an input voltage node and an output voltage node of the charge pump converter, a first capacitive element having a first terminal coupled to a node between the first and second transistors, and a first switch coupled to the input voltage node, the first switch being configured to selectively enable a first drive circuit having an output coupled to a control terminal of the second transistor.
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Patent Agency Ranking
公开(公告)号：US20160268899A1
公开(公告)日：2016-09-15
申请号：US14817887
申请日：2015-08-04
Applicant: QUALCOMM Incorporated
Inventor： William Rader , Edward Robert Deak
CPC classification number: H02M3/156 , H02M3/157 , H02M3/1584 , H02M2001/0012 , H02M2001/0048 , H02M2001/0054 , H02M2001/008 , H02M2001/327 , Y02B70/1491
Abstract: A circuit that stores characterized loss information for a buck converter and uses the characterized loss information instead of measurements involving output power dependent losses. The characterized loss information may include the characterized switching loss, the characterized ripple loss, etc. The circuit may then calculate the output power, efficiency, power dissipation, etc. without needing to measure the output current.
Abstract translation: 存储用于降压转换器的特征丢失信息的电路，并使用表征的损耗信息，而不是涉及输出功率相关损耗的测量。 表征的损耗信息可以包括表征的开关损耗，表征的纹波损耗等。然后，电路可以计算输出功率，效率，功耗等，而不需要测量输出电流。
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公开(公告)号：US10033272B2
公开(公告)日：2018-07-24
申请号：US14817887
申请日：2015-08-04
Applicant: QUALCOMM Incorporated
Inventor： William Rader , Edward Robert Deak
Abstract: A circuit that stores characterized loss information for a buck converter and uses the characterized loss information instead of measurements involving output power dependent losses. The characterized loss information may include the characterized switching loss, the characterized ripple loss, etc. The circuit may then calculate the output power, efficiency, power dissipation, etc. without needing to measure the output current.
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公开(公告)号：US09755514B2
公开(公告)日：2017-09-05
申请号：US14793147
申请日：2015-07-07
Applicant: QUALCOMM Incorporated
Inventor： Stuart Pullen , William Rader
CPC classification number: H02M3/158 , H02M1/088 , H02M3/1588 , H02M2001/0032 , H02M2001/0054 , Y02B70/1466 , Y02B70/1491 , Y02B70/16
Abstract: In one embodiment, a method receives a shed comparison signal that is based on a comparison of a voltage detected from a voltage converter to a reference voltage and receives a zero cross signal that indicates whether a current from the voltage converter has crossed zero. The shed comparison signal is sampled for a first number of clock cycles to generate shed comparison sampled values. Also, the zero cross signal is sampled for a second number of clock cycles to generate zero cross sampled values where the second number of clock cycles are less than the first number of clock cycles. The method determines a change between a shed state and an unshed state based on the shed comparison sampled values for the first number of clock cycles or the zero cross sampled values for the second number of clock cycles.
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公开(公告)号：US20200076306A1
公开(公告)日：2020-03-05
申请号：US16556068
申请日：2019-08-29
Applicant: QUALCOMM Incorporated
Inventor： Stuart Pullen , William Rader
Abstract: A buck-or-boost switching regulator circuit includes an analog control circuit that generates a control signal to control the buck-or-boost switching regulator circuit to operate in different modes including a buck mode, a boost mode, and a pass mode. A first amplifier in the control loop circuit generates a first error signal based on one or more of an output voltage, an input current and an output current of the buck-or-boost switching regulator, and a reference voltage. The control signal is based on the first error signal. A control signal adjustment circuit, coupled to an output of the first amplifier, prevents the control signal from getting high enough to be sliced by a boost voltage ramp signal or to be low enough to be sliced by a buck voltage ramp signal based on an input voltage and an output voltage of the buck-or-boost switching regulator circuit.
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7.发明授权Correction circuits for successive-approximation-register analog-to-digital converters 有权用于逐次逼近寄存器模数转换器的校正电路公开(公告)号：US09294110B1
公开(公告)日：2016-03-22
申请号：US14608928
申请日：2015-01-29
Applicant: QUALCOMM Incorporated
Inventor： Stuart Pullen , William Rader
CPC classification number: H02M3/157 , G01R19/0092 , H03M1/129 , H03M1/46 , H03M1/765
Abstract: In one embodiment, a correction circuit comprises circuit comprises a replica transistor biased at a current density to match that of a high side transistor of an output power switch at a specific load. A sample and hold circuit is coupled to the replica transistor to sample a voltage across the replica transistor. A differential amplifier provides a level shifted differential replica voltage to a tap of a resistor ladder of a successive approximation register analog-to-digital converter in response to the sampled voltage across the replica transistor. A current source provides a current to a top of the resistor ladder.
Abstract translation: 在一个实施例中，校正电路包括电路，其包括以电流密度偏置以与特定负载下的输出功率开关的高侧晶体管相匹配的复制晶体管。 采样和保持电路耦合到复制晶体管以对复制晶体管两端的电压进行采样。 差分放大器响应于复制晶体管上的采样电压，向逐次逼近寄存器模数转换器的电阻梯的抽头提供电平移位差分复制电压。 电流源向电阻梯的顶部提供电流。
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