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    SPLIT READ TRANSACTIONS OVER AN AUDIO COMMUNICATION BUS
    11.
    发明申请
    SPLIT READ TRANSACTIONS OVER AN AUDIO COMMUNICATION BUS 审中-公开

    公开(公告)号：US20190250876A1

    公开(公告)日：2019-08-15

    申请号：US16260299

    申请日：2019-01-29

    Applicant: QUALCOMM Incorporated

    Inventor： Lior Amarilio ,  Sharon Graif ,  Shaul Yohai Yifrach

    IPC: G06F3/16

    CPC classification number: G06F3/162 ,  G06F2213/0002 ,  G06F2213/0026

    Abstract: Systems and methods for providing split read transactions over an audio communication bus are disclosed. In one aspect, a device that receives a read command informs a requester that data is not yet available and to try again at a future time, potentially outside the traditional response window. In the meantime, the receiving device begins fetching the requested data to have available when the requester makes a subsequent request. By providing a not yet response, data may be fetched from a memory element in a low-power state after it has been taken out of the low-power state or data may be fetched from a remote location or over a slow internal bus.

    VIRTUAL GENERAL PURPOSE INPUT/OUTPUT (GPIO) (VGI) OVER A TIME DIVISION MULTIPLEX (TDM) BUS
    12.
    发明申请
    VIRTUAL GENERAL PURPOSE INPUT/OUTPUT (GPIO) (VGI) OVER A TIME DIVISION MULTIPLEX (TDM) BUS 审中-公开

    公开(公告)号：US20190229824A1

    公开(公告)日：2019-07-25

    申请号：US15878790

    申请日：2018-01-24

    Applicant: QUALCOMM Incorporated

    Inventor： Lior Amarilio ,  Sharon Graif ,  Lalan Jee Mishra

    IPC: H04J3/02 ,  G06F3/16

    Abstract: Systems and methods for providing virtual general purpose input/output (GPIO) (VGI) over a time division multiplex (TDM) bus are disclosed. While a SOUNDWIRE bus is particularly contemplated, other TDM buses may also be used to provide the benefits outlined herein. In particular, raw GPIO signals are placed into time slots on a TDM bus without requiring additional overhead or packaging. This arrangement allows all drops on a multi-drop bus to receive the GPIO signals substantially concurrently with latency measured in less than a frame period.

    TUNNELING OVER UNIVERSAL SERIAL BUS (USB) SIDEBAND CHANNEL
    14.
    发明申请
    TUNNELING OVER UNIVERSAL SERIAL BUS (USB) SIDEBAND CHANNEL 有权

    公开(公告)号：US20220129398A1

    公开(公告)日：2022-04-28

    申请号：US17082873

    申请日：2020-10-28

    Applicant: QUALCOMM Incorporated

    Inventor： Yiftach Benjamini ,  Lior Amarilio ,  Sharon Graif

    IPC: G06F13/20 ,  G06F13/42

    Abstract: Tunneling over Universal Serial Bus (USB) sideband channel systems and methods provide a way to tunnel I2C transactions between a master and slaves over USB 4.0 sideband channels. More particularly, a slave address table lookup (SATL) circuit is added to a host circuit. Signals from an I2C bus are received at the host, and any address associated with a destination is translated by the SATL. The translated address is passed to a low-speed interface associated with a sideband channel in the host circuit. Signals received at the low-speed interface are likewise reverse translated in the SATL and then sent out through the I2C bus. In this fashion, low-speed I2C signals may be routed over the sideband channel through the low-speed sideband interface portion of the USB interface.

    Aggregated in-band interrupt based on responses from slave devices on a serial data bus line
    15.
    发明授权
    Aggregated in-band interrupt based on responses from slave devices on a serial data bus line 有权

    公开(公告)号：US11030133B2

    公开(公告)日：2021-06-08

    申请号：US16551447

    申请日：2019-08-26

    Applicant: QUALCOMM Incorporated

    Inventor： Sharon Graif ,  Meital Zangvil ,  Tomer Rafael Ben-Chen

    IPC: G06F13/24 ,  G06F13/42

    Abstract: Methods and apparatuses for aggregated IBIs are provided. The apparatus includes a host controller configured to communicate with at least one slave via a serial communication bus, trigger and receive a series of responses from the at least one slave via the serial communication bus, determine one response of the series of responses indicating an in-band interrupt (IBI) request, and respond to the IBI request based on a position of the one response among the series of responses. The method includes communicating with at least one slave via a serial communication bus, triggering and receiving a series of responses from the at least one slave via the serial communication bus, determining one response of the series of responses indicating an in-band interrupt (IBI) request, and responding to the IBI request based on a position of the one response among the series of responses.

    Urgent in-band interrupts on an I3C bus
    17.
    发明授权
    Urgent in-band interrupts on an I3C bus 有权

    公开(公告)号：US10678723B2

    公开(公告)日：2020-06-09

    申请号：US16134559

    申请日：2018-09-18

    Applicant: QUALCOMM Incorporated

    Inventor： Sharon Graif ,  Lior Amarilio ,  Mark Gakman

    IPC: G06F13/24 ,  G06F13/362 ,  G06F13/42

    Abstract: Systems, methods, and apparatus are described that enable communication of in-band reset signals over an I3C serial bus. A method performed at a slave device includes driving a data line of the I3C serial bus from a high state to a low state before a first clock pulse is received from a clock line of the I3C serial bus after a start condition has been provided on the I3C serial bus, where driving the data line from the high state to the low state produces an initial pulse on the data line, transmitting one or more additional pulses on the data line before the first clock pulse is transmitted on the clock line, and driving the data line low until a rising edge of the first clock pulse is detected on the clock line after each of the plurality of additional pulses has been successfully transmitted on the data line.

    ALWAYS-ON IBI HANDLING
    18.
    发明申请
    ALWAYS-ON IBI HANDLING 审中-公开

    公开(公告)号：US20200065274A1

    公开(公告)日：2020-02-27

    申请号：US16110129

    申请日：2018-08-23

    Applicant: QUALCOMM Incorporated

    Inventor： Sharon Graif ,  David Teb ,  Oren Nishry

    IPC: G06F13/24 ,  G06F13/42

    Abstract: Methods and apparatuses for IBI handling are provided. The apparatus includes at least one processing unit, a host controller configured to communicate with at least one slave via an I3C link and configured to enter into a low-power mode. The I3C link includes a serial clock (SCL) line and a serial data (SDA) line. The apparatus further includes an IBI detection module configured to detect while the host controller is in the low-power mode, on the SDA line, an in-band interrupt (IBI) request from the at least one slave and a processing unit interrupt control module configured to signal a processing unit interrupt to the at least one processing unit based on information of the IBI request, in the case the host controller is in the low-power mode, in response to the IBI detection module detecting the IBI request.

    Phase alignment in an audio bus
    19.
    发明授权
    Phase alignment in an audio bus 有权

    公开(公告)号：US10560780B2

    公开(公告)日：2020-02-11

    申请号：US16260325

    申请日：2019-01-29

    Applicant: QUALCOMM Incorporated

    Inventor： Lior Amarilio ,  Ghanashyam Prabhu ,  Sharon Graif ,  Mouna Elkhatib

    IPC: H04B3/00 ,  H04R3/12 ,  G06F3/16 ,  H04R5/04 ,  H04R3/00 ,  G06F13/42

    Abstract: Exemplary aspects of the present disclosure assist in phase alignment for systems having multiple audio sources. For example, in a system having plural microphones, phase alignment may also be assisted by sampling the microphones at the appropriate time relative to when the samples are placed on the audio bus. Further, phase shifts between audio samples are reduced or eliminated by keeping a sample delay constant for samples from the same microphone. Such manipulation of the audio samples reduces phase shifts which reduces the likelihood of an audio artifact capable of being detected by the human ear and thus improves consumer experience.

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