公开(公告)号：US09786594B2

公开(公告)日：2017-10-10

申请号：US14516806

申请日：2014-10-17

Applicant: Renesas Electronics Corporation

Inventor： Shigeo Tokumitsu ,  Takahiro Mori ,  Tetsuya Nitta

IPC: H01L23/522 ,  H01L49/02 ,  H01L27/08 ,  H01L23/532

Abstract: A plurality of first wiring layers are arranged on a main surface of a substrate, a first insulating film is arranged on upper faces of the plurality of first wiring layers, a second insulating film is arranged on an upper face of the first insulating film, and a plurality of second wiring layers are arranged on the second insulating film. A metal resistive element layer is arranged just below at least one second wiring layer among the plurality of second wiring layers. A plurality of conductive layers extend from the plurality of second wiring layers respectively to the metal resistive element layer in a Z direction perpendicular to the main surface. The metal resistive element layer includes a metal wiring layer. At least one part of a side face of at least one conductive layer among the plurality of conductive layers is connected to the metal wiring layer.

公开(公告)号：US09356135B2

公开(公告)日：2016-05-31

申请号：US14605027

申请日：2015-01-26

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kosuke Yoshida ,  Tetsuya Nitta

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/7813 ,  H01L27/0922 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7809

Abstract: To provide a semiconductor device capable of suppressing a reduction in breakdown voltage by suppressing a change in dimensions of a double RESURF structure, and a method of manufacturing the same.In the semiconductor device, an upper RESURF region is formed so as to contact with a first buried region on a side of the one main surface within a semiconductor substrate. The semiconductor substrate has a field oxide formed so as to reach the upper RESURF region on the one main surface. The semiconductor substrate includes a second conductivity type body region formed so as to contact with the upper RESURF region on a side of the one main surface and so as to neighbor the field oxide within the semiconductor substrate.

Abstract translation: 为了提供能够通过抑制双重RESURF结构的尺寸变化来抑制击穿电压降低的半导体器件及其制造方法。 在半导体器件中，上部RESURF区域形成为与半导体衬底内的一个主表面侧的第一掩埋区域接触。 半导体衬底具有形成为在一个主表面上到达上RESURF区域的场氧化物。 半导体衬底包括形成为与一个主表面侧上部RESURF区接触并与半导体衬底内的场氧化物相邻的第二导电类型体区。

公开(公告)号：US08692352B2

公开(公告)日：2014-04-08

申请号：US13725389

申请日：2012-12-21

Applicant: Renesas Electronics Corporation

Inventor： Kazuma Onishi ,  Yoshitaka Otsu ,  Hiroshi Kimura ,  Tetsuya Nitta ,  Shinichiro Yanagi ,  Katsumi Morii

IPC: H01L29/00

CPC classification number: H01L29/0649 ,  H01L21/764 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/82385 ,  H01L21/823857 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0922 ,  H01L27/11521 ,  H01L27/11526 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.

Abstract translation: 一种半导体器件，其通过简单的工艺消除了对高填充性的需要及其制造方法。 在半导体衬底的表面上完成包括源极区和漏极区的高击穿电压横向MOS晶体管。 在半导体衬底的表面中制造在平面图中观察时围绕晶体管的沟槽。 在晶体管和沟槽中形成绝缘膜，以覆盖晶体管并在沟槽中形成气隙空间。 到达晶体管的源极区域和漏极区域的接触孔分别制成层间绝缘膜。