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11.发明授权Method and system for fault protection using a linear feedback shift register 失效使用线性反馈移位寄存器进行故障保护的方法和系统公开(公告)号：US08559287B1
公开(公告)日：2013-10-15
申请号：US12143564
申请日：2008-06-20
IPC分类号： G11B11/00
摘要： A method, system and apparatus for fault protection using a linear feedback shift register are presented. The system comprises a protected register containing a first portion for holding a value for a sequence of numbers and a second portion for other parameters. The system also comprises a linear feedback shift register circuit configured to write the sequence of numbers to the first portion of the protected register. If the written sequence of numbers of the protected register matches a reference sequence of numbers, a rewrite circuit is configured to write the second portion of the protected register.
摘要翻译： 提出了一种使用线性反馈移位寄存器进行故障保护的方法，系统和装置。 该系统包括受保护的寄存器，其包含用于保存数字序列的值的第一部分和用于其他参数的第二部分。 该系统还包括线性反馈移位寄存器电路，其配置为将数字序列写入受保护寄存器的第一部分。 如果写入的受保护寄存器的编号顺序与参考序列号匹配，则重写电路被配置为写入受保护寄存器的第二部分。
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12.发明授权Method of improving quality of optical recording using circumferentially repeatable compensation 有权使用周向可重复补偿来提高光学记录质量的方法公开(公告)号：US08391115B1
公开(公告)日：2013-03-05
申请号：US12367417
申请日：2009-02-06
IPC分类号： G11B7/00
CPC分类号： G11B7/1267
摘要： Systems, methods and compute program products for compensating for asymmetry variations are described. The asymmetry variations may be monitored both circumferentially and radially across an optical storage medium such that effects of the asymmetry variations may be compensated or minimized. In some implementations, effects of asymmetry variations may be compensated or minimized by first determining light reflected from a circumferential location of an optical storage medium. Then, at least one quality measure based on the detected light is determined. The correlation may be established based on the at least one quality measure and a corresponding circumferential location. A power level of a light source that emits the light is then adjusted based on the correlation.
摘要翻译： 描述了用于补偿不对称变化的系统，方法和计算程序产品。 可以在光学存储介质上沿周向和径向地监测不对称变化，使得可以补偿或最小化不对称变化的影响。 在一些实现中，可以通过首先确定从光存储介质的周向位置反射的光来补偿或最小化不对称变化的影响。 然后，确定基于检测到的光的至少一个质量测量。 可以基于至少一个质量测量和相应的圆周位置建立相关性。 然后基于相关性来调整发射光的光源的功率电平。
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公开(公告)号：US08345523B1
公开(公告)日：2013-01-01
申请号：US13440471
申请日：2012-04-05
IPC分类号： G11B7/00
CPC分类号： G11B7/0062
摘要： Aspects of the disclosure can provide a method to optimize optical recording. The method can include recording a pre-defined pattern on an optical medium according to a first write strategy, measuring edge timings corresponding to the pre-defined pattern recorded on the optical medium, determining a second write strategy including at least timing modifications to the first write strategy. The timing modifications can be determined based on means and variances of the measured edge timings, edge timing means and variances targets for desired edge timings, and edge timing sensitivities to the timing modifications.
摘要翻译： 本公开的方面可以提供优化光学记录的方法。 该方法可以包括根据第一写入策略在光学介质上记录预定义的图案，测量对应于记录在光学介质上的预定义图案的边缘定时，确定第二写入策略，该第二写入策略至少包括对第一 写策略。 可以基于所测量的边缘定时，边缘定时装置和期望边缘定时的方差目标以及对定时修改的边缘定时灵敏度的平均值和方差来确定时序修改。
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公开(公告)号：US08154968B1
公开(公告)日：2012-04-10
申请号：US12360660
申请日：2009-01-27
IPC分类号： G11B7/00
CPC分类号： G11B7/0062
摘要： Aspects of the disclosure can provide a method to optimize optical recording. The method can include recording a pre-defined pattern on an optical medium according to a first write strategy, measuring edge timings corresponding to the pre-defined pattern recorded on the optical medium, determining a second write strategy including at least timing modifications to the first write strategy. The timing modifications can be determined based on means and variances of the measured edge timings, edge timing means and variances targets for desired edge timings, and edge timing sensitivities to the timing modifications.
摘要翻译： 本公开的方面可以提供优化光学记录的方法。 该方法可以包括根据第一写入策略在光学介质上记录预定义的图案，测量对应于记录在光学介质上的预定义图案的边缘定时，确定第二写入策略，该第二写入策略至少包括对第一 写策略。 可以基于所测量的边缘定时，边缘定时装置和期望边缘定时的方差目标以及对定时修改的边缘定时灵敏度的平均值和方差来确定时序修改。
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15.发明授权Circuits, architectures, apparatuses, systems, algorithms and methods and software for optimum power calibration for optical disc recording 有权电路，架构，设备，系统，算法和方法和软件，用于光盘记录的最佳功率校准公开(公告)号：US07839739B2
公开(公告)日：2010-11-23
申请号：US11646098
申请日：2006-12-26
IPC分类号： G11B15/52
CPC分类号： G11B20/10009 , G11B7/1267 , G11B20/1217 , G11B2020/1275 , G11B2220/2537
摘要： Methods, software, and apparatus for the calibration of writing characteristics for writing to an optical storage medium, and methods of encoding calibration pattern data and calibration instructions are disclosed. The method of calibration generally includes the steps of (a) receiving pattern data and instructions synchronized with the pattern data, (b) writing the pattern data to the optical storage medium in accordance with the instructions, (c) reading a readback signal corresponding to the pattern data from the optical storage medium, (d) processing the readback signal in accordance with the instructions, and (e) determining a value of a writing characteristic for writing data to the optical storage medium based at least in part on the readback signal. The method provides the ability to flexibly set test parameters and to quickly and accurately test the write characteristics of a recordable or re-writable optical storage medium.
摘要翻译： 公开了用于校准写入光学存储介质的写入特性的方法，软件和装置，以及编码校准图案数据和校准指令的方法。 校准方法通常包括以下步骤：（a）接收与图案数据同步的图案数据和指令，（b）根据指令将图案数据写入光学存储介质，（c）读取对应于 来自光存储介质的图案数据，（d）根据指令处理回读信号，以及（e）至少部分地基于回读信号确定用于将数据写入光存储介质的写入特性的值 。 该方法提供了灵活设置测试参数并快速准确地测试可记录或可重写光存储介质的写特性的能力。
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公开(公告)号：US07475173B2
公开(公告)日：2009-01-06
申请号：US11378456
申请日：2006-03-17
申请人： Siamack Nemazie , Kaushik Popat , Balaji Virajpet , William R. Foland, Jr. , Roger McPherson , Maoxin Wei , Vineet Dujari , Shiang-Jyh Chang
发明人： Siamack Nemazie , Kaushik Popat , Balaji Virajpet , William R. Foland, Jr. , Roger McPherson , Maoxin Wei , Vineet Dujari , Shiang-Jyh Chang
IPC分类号： G06F13/00
CPC分类号： G06F3/0626 , G06F3/0658 , G06F3/0673 , G06F3/0676 , G11B19/00 , G11B20/10009 , G11B25/043
摘要： An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.
摘要翻译： 集成数据存储控制系统在单一集成电路中提供RDC，伺服逻辑，ATA接口，微处理器以及其它以前分立的组件，在一个高度集成的系统设计中。 使用针对所有组件的单个集成电路技术类型（例如，数字CMOS）来呈现集成电路。 模拟和数字电路的组合方式是消除或减少模拟电路组件在数字电路中的噪声或干扰。 单个元件可以将它们的输出和输入多路复用在一起，使得各个元件可以选择性地切换（在测试模式期间），使得集成电路以与现有技术组件中的一个相同或相似的方式进行仿真或表现。 本发明可以应用于磁性硬盘驱动器（HDD）或诸如软盘控制器，光盘驱动器（例如CD-ROM等），磁带驱动器和其他数据存储设备的其它类型的存储设备。
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公开(公告)号：US5412669A
公开(公告)日：1995-05-02
申请号：US164260
申请日：1993-12-09
CPC分类号： H03M13/4107
摘要： A circuit for minimizing the number of cycles needed to add a first number of quantities together to produce a first result in parallel with the addition of a similar number of quantities to produce a second result, subtracting one result from the other to determine which result is the least, and selecting and storing the least result. For the various additions and the subtraction above named, n bit addends are divided into m upper bits and n-m lower bits. m bit addends (upper bits) are added together separately from and simultaneously with the addition of the n-m bits (lower bits). The first m bit result is subtracted from the second m bit result and the upper bit of that subtraction is adjusted according to the number of carry bits produced by the various lower bit additions and subtraction. In that manner, an accurate comparison of the two m bit results is obtained. A logic array and a mux array provide fast adjustment so that the entire add, compare, and select process is accomplished in one cycle.
摘要翻译： 一种电路，用于最小化将第一数量的数量加在一起以产生与添加相似数量的量并行产生第二结果所需的周期数，从另一个结果中减去一个结果以确定哪个结果是 至少，并选择和存储最少的结果。 对于上面提到的各种加法和减法，n位加数分为m个高位和n-m个较低位。 m位加数（高位）与n-m位（低位）的相加分开并且同时加在一起。 从第二m比特结果中减去第一个m比特结果，并根据由各种低位加法和减法产生的进位位数来调整该减法的高位。 以这种方式，可以获得两个m位结果的精确比较。 逻辑阵列和多路复用器阵列提供快速调整，使得整个加法，比较和选择过程在一个周期内完成。
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