公开(公告)号：US20070283069A1

公开(公告)日：2007-12-06

申请号：US11671410

申请日：2007-02-05

申请人： Larry Jones ,  Sreenath Mambakkam ,  Arockiyaswamy Venkidu

发明人： Larry Jones ,  Sreenath Mambakkam ,  Arockiyaswamy Venkidu

IPC分类号： G06F13/40

CPC分类号： G06F13/387 ,  G06F3/0646 ,  G06F13/38 ,  G06F13/385 ,  G06F13/4027 ,  G06K7/0013 ,  G06K7/0043 ,  G06K7/0052 ,  G06K7/0073 ,  G06K19/07741 ,  H05K5/0282

摘要： A flash-memory-card reader reads and writes multiple types of flash-memory cards, including CompactFlash, and the smaller SmartMedia, MultiMediaCard, Secure Digital, and Memory Stick. A converter chip converts the different card signals for transfer to a host personal computer (PC). Serial-to-parallel data conversion is performed for the smaller card formats with serial data interfaces, but not for CompactFlash with a parallel-data interface. A signal slot has a 50-pin connector for CompactFlash cards or passive adapters. The passive adapters have the CompactFlash form factor and a smaller connector fitting smaller flash cards. Passive adapters have no components but simply wire the smaller connector to the CompactFlash connector. A pin mapping allows card-type detection by sensing the LSB address pins of the CompactFlash interface. A larger CompactFlash reader has multiple slots for each card type. The reader is connected to the PC by a cable, or located within the PC chassis in a drive bay. A stand-alone reader copies images from the flash-memory card to a removable disk media. Pressing a button initiates image transfer.

摘要翻译： 闪存卡读卡器读写多种类型的闪存卡，包括CompactFlash，以及较小的SmartMedia，MultiMediaCard，Secure Digital和Memory Stick。 A转换器芯片将不同的卡信号转换为主机个人计算机（PC）。 对于具有串行数据接口的较小卡格式执行串行到并行数据转换，但不适用于具有并行数据接口的CompactFlash。 信号插槽具有用于CompactFlash卡或无源适配器的50针连接器。 无源适配器具有CompactFlash外形尺寸，较小的连接器配有较小的闪存卡。 无源适配器没有组件，只是将较小的连接器连接到CompactFlash连接器。 引脚映射可以通过感测CompactFlash接口的LSB地址引脚进行卡型检测。 一个更大的CompactFlash读卡器有多个插槽用于每种卡类型。 读卡器通过电缆连接到PC，或者位于驱动器托架中的PC机箱内。 独立阅读器将闪存卡中的图像复制到可移动磁盘介质。 按下按钮可启动图像传输。

公开(公告)号：US20070033561A1

公开(公告)日：2007-02-08

申请号：US11198451

申请日：2005-08-04

申请人： Larry Jones ,  Feng Li ,  Mohan Govindaraj ,  Bradley Roetcisoender ,  Michael Weaver

发明人： Larry Jones ,  Feng Li ,  Mohan Govindaraj ,  Bradley Roetcisoender ,  Michael Weaver

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： One embodiment of the present invention provides a system that speeds up timing analysis by reusing delays computed for isomorphic subcircuit. During operation, the system receives a circuit block to be analyzed, wherein the circuit block is in the form of a netlist. The system then subdivides the circuit block into a set of subcircuits. The subcircuits are then partitioned into equivalence classes, which contain subcircuits which are topologically isomorphic to each other. Next, the system performs a timing analysis by tracing paths through a timing graph for the circuit block. During this timing analysis, whenever a delay is required for a subcircuit, the system determines if a corresponding delay has been already computed for the equivalence class associated with the subcircuit. If so, the system reuses the delay. If not, the system computes the delay for the subcircuit, and then associates the computed delay with the equivalence class so that the computed delay can be reused for isomorphic subcircuits.

摘要翻译： 本发明的一个实施例提供了一种系统，其通过重新利用为同构子电路计算的延迟来加速时序分析。 在操作期间，系统接收要分析的电路块，其中电路块是网表的形式。 然后，系统将电路块细分成一组子电路。 然后将子电路分成等价类，其中包含彼此拓扑上同构的子电路。 接下来，系统通过用于电路块的时序图跟踪路径来执行定时分析。 在此定时分析期间，每当子电路需要延迟时，系统确定是否已经为与子电路相关联的等效类计算了相应的延迟。 如果是这样，系统重新使用延迟。 如果不是，则系统计算子电路的延迟，然后将计算的延迟与等价类相关联，使得计算的延迟可以重用于同构子电路。

公开(公告)号：US07144111B1

公开(公告)日：2006-12-05

申请号：US10689567

申请日：2003-10-20

申请人： Denwood F. Ross, III ,  Larry Jones

发明人： Denwood F. Ross, III ,  Larry Jones

IPC分类号： A61B3/125

CPC分类号： A61B3/117 ,  G02B9/08

摘要： A gonioscopic lens system which provides a real image of the anterior chamber angle of a patient's eye. The lens system includes a first lens group having a concave posterior surface configured to be placed on a patient's eye, a second lens group optically aligned with the first lens group; and a stop positioned between the first and second lens groups. An achromatic gonioscopic lens system which provides a real image of the anterior chamber angle of a patient's eye is also provided, as well as an ophthalmoscopy lens system for viewing both the anterior chamber angle and the retina of a patient's eye.

摘要翻译： 一种前房角镜系统，其提供患者眼睛的前房角度的真实图像。 透镜系统包括具有被配置为放置在患者眼睛上的凹后表面的第一透镜组，与第一透镜组光学对准的第二透镜组; 以及位于第一和第二透镜组之间的止动件。 还提供了提供患者眼睛的前房角度的真实图像的消乐差角镜镜片系统，以及用于观察患者眼睛的前房角度和视网膜的检眼镜系统。

公开(公告)号：US20060264110A1

公开(公告)日：2006-11-23

申请号：US11492556

申请日：2006-07-24

申请人： Sreenath Mambakkam ,  Arockiyaswamy Venkidu ,  Larry Jones

发明人： Sreenath Mambakkam ,  Arockiyaswamy Venkidu ,  Larry Jones

IPC分类号： H01R24/00

CPC分类号： H01R27/00 ,  H01R27/02 ,  H01R29/00 ,  Y10S439/945 ,  Y10S439/946

摘要： A multi-memory media adapter comprised of a first planar element having an upper surface and a lower surface, a second planar element having an upper surface and a lower surface, and formed from a single material. The two planar elements form at least one port, each port capable of receiving one or more types of a memory media card. The adapter has at least one set of contact pins protruding from the lower surface of the first planar element or the upper surface of the second planar element such that the at least one set of contact pins are disposed within the port. The at least one set of contact pins are capable of contacting the contacts of a memory media card inserted into the port. For one embodiment a controller chip is embedded within the single material forming the multi-memory media adapter.

公开(公告)号：US20060181912A1

公开(公告)日：2006-08-17

申请号：US11095211

申请日：2005-03-30

申请人： Sree Iyer ,  Larry Jones ,  Nicholas Antonopoulos ,  Santosh Kumar ,  Dan Kikinis ,  Arockiyaswamy Venkidu

发明人： Sree Iyer ,  Larry Jones ,  Nicholas Antonopoulos ,  Santosh Kumar ,  Dan Kikinis ,  Arockiyaswamy Venkidu

IPC分类号： G11C5/06

CPC分类号： H04M1/72527 ,  H04M1/7253

摘要： A storage controller comprising a first interface to exchange data with an appliance, such as a cell phone; a second interface to exchange data with a host system and receive power from the host system to provide power to the appliance; and a solid state memory to provide the appliance with storage for data.

摘要翻译： 一种存储控制器，包括与设备（诸如手机）交换数据的第一接口; 第二接口，与主机系统交换数据，并从主机系统接收电力给设备供电; 以及固态存储器，为设备提供数据存储。

公开(公告)号：US20050124279A1

公开(公告)日：2005-06-09

申请号：US11031763

申请日：2005-01-07

申请人： Sarid Shefet ,  Lawrence Chandler ,  John Phillips ,  Frank Horvath ,  Richard Hawkins ,  Larry Jones

发明人： Sarid Shefet ,  Lawrence Chandler ,  John Phillips ,  Frank Horvath ,  Richard Hawkins ,  Larry Jones

IPC分类号： A22C11/12 ,  A22C15/00 ,  A22B7/00

CPC分类号： A22C15/002 ,  A22C11/127

摘要： Automated loaders are configured with winding mechanisms that wind elongated products directly onto transfer members, such as sticks or rods, by causing the arm to follow a repetitive motion pattern above and below the stick or rod to discharge the elongated product in a winding motion onto the stick or rod. Methods for discharging elongated product, such as encased meats, so that they loop directly onto the stick, bar or other desired food support is also described.

摘要翻译： 自动装载机配置有卷绕机构，其通过使臂沿着棒或杆上方和下方的重复运动模式将细长的产品直接卷绕到转移构件（例如棒或杆）上，以将缠绕运动中的细长产品排出到 棒或棒。 还描述了用于排出细长产品的方法，例如包装的肉，使得它们直接环绕到棒，棒或其它期望的食物支撑物上。

公开(公告)号：US5768627A

公开(公告)日：1998-06-16

申请号：US573497

申请日：1995-12-15

申请人： Larry Jones ,  Arockiyaswamy Venkidu ,  Sreenath Mambakkam

发明人： Larry Jones ,  Arockiyaswamy Venkidu ,  Sreenath Mambakkam

IPC分类号： G06F11/34 ,  G06F15/02 ,  G06F13/14

CPC分类号： G06F13/4217 ,  G06F11/3419 ,  G06F2201/88

摘要： The timing of control signals in a parallel port is measured and adjusted to achieve optimum timing of these control signals. At boot-up, a routine writes alternating data to the control register of the parallel port. The control register drives control signal over a parallel-port cable to an external parallel-port device connected to the parallel port of a personal computer (PC). Transitions of the control signal trigger an external timer in the external parallel-port device which measures the pulse width of the control signal. The measured pulse width is sent back to the PC over the parallel cable and compared to a target pulse width. When the measured pulse width is less than the target, additional intervening instructions are inserted between writes to the parallel-port control register. The intervening instructions are a simple delay loop. Alternately the internal timer on the PC may be used. Since the accuracy is less for the internal timer, many IO writes are performed to average out errors. Several external devices having cross-over adapters may be coupled together and addressed separately. Two of the ground signals in the parallel port are used as addressing grounds.

摘要翻译： 对并行端口中的控制信号的定时进行测量和调整，以实现这些控制信号的最佳定时。 在启动时，例程将交替数据写入并行端口的控制寄存器。 控制寄存器通过并行端口电缆将控制信号驱动到连接到个人计算机（PC）并行端口的外部并行端口设备。 控制信号的转换触发了测量控制信号脉冲宽度的外部并行端口设备中的外部定时器。 测量的脉冲宽度通过并行电缆发送回PC，并与目标脉冲宽度进行比较。 当测量的脉冲宽度小于目标时，在对并行端口控制寄存器的写入之间插入附加的插入指令。 介入指令是一个简单的延迟循环。 也可以使用PC上的内部定时器。 由于内部定时器的精度较低，因此执行许多IO写操作以平均出错。 具有交叉适配器的多个外部设备可以耦合在一起并单独寻址。 并行端口中的两个接地信号用作寻址地。

公开(公告)号：US5355377A

公开(公告)日：1994-10-11

申请号：US156075

申请日：1993-11-23

申请人： Arockiyaswamy Venkidu ,  Larry Jones ,  Nick Antonopoulos

发明人： Arockiyaswamy Venkidu ,  Larry Jones ,  Nick Antonopoulos

IPC分类号： G06F11/10 ,  H03M13/00

CPC分类号： G06F11/1032

摘要： A parity generating circuit that can replace the parity bit DRAM on a 9-bit SIMM. The parity generating circuit includes a parity generating tree which outputs the resulting even parity from the 8 data bits on a read. A 9th data input from another parity generator on the system mother board is compared to the generator tree output when DRAM is written to. If a mismatch occurs, the type of parity generated by the generator tree is opposite to the type of parity that the mother board generates, and the parity tree output must be inverted on subsequent reads. A latch is provided to store the compare result, which also indicates the type of parity required, even or odd, on the particular system the SIMM is installed on. The latch is loaded when the DRAM is written to. The state of the latch is used to output the correct type of parity on a read from DRAM by inverting the output of the parity generating circuit if needed. This eliminates the cost of the 9th DRAM chip on the SIMM, yet allows for parity checking of the data paths on the system board traces and any older 9-bit memory present in the system.

摘要翻译： 奇偶校验产生电路，可以替代9位SIMM上的奇偶校验位DRAM。 奇偶生成电路包括奇偶生成树，其在读取时从8个数据位输出所得到的偶校验。 当DRAM被写入时，将来自系统母板上的另一个奇偶校验发生器的第9个数据输入与发生器树输出进行比较。 如果发生不匹配，则由生成树生成的奇偶校验类型与母板生成的奇偶校验类型相反，并且奇偶校验树输出必须在随后的读取中反转。 提供一个锁存器来存储比较结果，这也表示SIMM安装在特定系统上所需的奇偶校验类型，偶数或奇数。 当DRAM被写入时，锁存器被加载。 如果需要，锁存器的状态用于通过将奇偶产生电路的输出反相来从DRAM读取输出正确类型的奇偶校验。 这消除了SIMM上第9个DRAM芯片的成本，但允许对系统板轨迹上的数据路径和系统中存在的任何较旧的9位存储器进行奇偶校验。

公开(公告)号：US11746542B2

公开(公告)日：2023-09-05

申请号：US17376759

申请日：2021-07-15

申请人： Larry Jones

发明人： Larry Jones

IPC分类号： E04F19/04 ,  E04F19/06 ,  H02G3/04

CPC分类号： E04F19/045 ,  E04F19/0477 ,  E04F19/061 ,  E04F2019/044 ,  E04F2019/0422 ,  E04F2019/0454 ,  H02G3/0425

摘要： Wall bases and methods for utilizing the same are provided. A rear surface of the wall base is configured to be secured to an adjacent forward surface of a wall. An extension member extends outward and downward from the base member, and a protrusion extends downward from the extension member. A channel for sealant is defined, at least in part, by the extension member and the protrusion. The protrusion may be separately formed from the extension member and base member.

公开(公告)号：US10655344B1

公开(公告)日：2020-05-19

申请号：US16185261

申请日：2018-11-09

申请人： Larry Jones

发明人： Larry Jones

IPC分类号： E04F19/04

摘要： A cove base for sealing a gap between a wall and a floor using a sealant is provided. The cove base comprises a base configured to extend along a portion of the wall when installed. A shoe extends at an angle from the base and is configured to extend towards the floor and away from the wall when installed. A heel extends from the shoe and is configured to contact the floor when installed. A channel configured to receive the sealant is defined by the space between the heel and the shoe.