Abstract:
A switching power supply includes: a switching output circuit configured to generate an output voltage from an input voltage by charging a capacitor by turning on and off an output transistor; a control circuit configured to halt the driving of the switching output circuit when charging electric charge to the capacitor per switching event is limited to a lower limit value and the output voltage, or a feedback voltage commensurate therewith, is raised from a predetermined reference voltage; and a lower limit value setting circuit configured to variably control the lower limit value during the driven period of the switching output circuit. For example, the lower limit value setting circuit can increase the lower limit value with increase in the number of times of switching.
Abstract:
This switching power source 100 has: a switching output circuit 110 which drives an inductor current IL by turning on and off an upper switch 111 and a lower switch 112 and generates an output voltage VOUT from an input voltage PVDD; a lower current detection unit 210 which detects the inductor current IL flowing through the lower switch 112 during an ON-period of the lower switch 112 and acquires lower current feedback information Iinfo; an error amplifier 140 which outputs voltage feedback information Vinfo including information on an error between the output voltage VOUT (feedback voltage FB) and a reference voltage REF; an information synthesis unit 220 that generates synthesis feedback information VIinfo by synthesizing Iinfo with Vinfo; and an information holding unit 230 which samples Vinfo during the ON-period of the lower switch 112.
Abstract:
An OTP readout circuit includes an OTP circuit having a first OTP cell in which data is programmable only once, and a readout-possible signal output unit configured to generate a readout-possible voltage for reading out the data and output the generated readout-possible voltage to the OTP circuit. The readout-possible voltage from the readout-possible signal output unit causes the OTP circuit to read out the data programmed into the first OTP cell.
Abstract:
This switching power source 100 has: a switching output circuit 110 which drives an inductor current IL by turning on and off an upper switch 111 and a lower switch 112 and generates an output voltage VOUT from an input voltage PVDD; a lower current detection unit 210 which detects the inductor current IL flowing through the lower switch 112 during an ON-period of the lower switch 112 and acquires lower current feedback information Iinfo; an error amplifier 140 which outputs voltage feedback information Vinfo including information on an error between the output voltage VOUT (feedback voltage FB) and a reference voltage REF; an information synthesis unit 220 that generates synthesis feedback information VIinfo by synthesizing Iinfo with Vinfo; and an information holding unit 230 which samples Vinfo during the ON-period of the lower switch 112.
Abstract:
This switching power source 100 has: a switching output circuit 110 which drives an inductor current IL by turning on and off an upper switch 111 and a lower switch 112 and generates an output voltage VOUT from an input voltage PVDD; a lower current detection unit 210 which detects the inductor current IL flowing through the lower switch 112 during an ON-period of the lower switch 112 and acquires lower current feedback information Iinfo; an error amplifier 140 which outputs voltage feedback information Vinfo including information on an error between the output voltage VOUT (feedback voltage FB) and a reference voltage REF; an information synthesis unit 220 that generates synthesis feedback information VIinfo by synthesizing Iinfo with Vinfo; and an information holding unit 230 which samples Vinfo during the ON-period of the lower switch 112.
Abstract:
An error amplifier amplifies a difference between a feedback signal VFB that corresponds to an output voltage VOUT of a DC/DC converter and its target value VREF, so as to generate an error signal VERR. A pulse width modulator for each channel is configured as a peak current mode modulator comprising a PWM comparator that compares a current detection signal VIS with the error signal VERR, and a logic circuit. When the number of enabled channels is switched, a soft shedding circuit selects at least one channel as a correction target channel. The soft shedding circuit generates a correction signal VCORR for each correction target channel, and superimposes each correction signal VCORR on at least one of two inputs of the corresponding PWM comparator.
Abstract:
A switching power supply circuit has: a switching output generator that generates an output voltage from an input voltage by using an output transistor; a switching controller that turns ON and OFF the output transistor so as to keep the output voltage, or a feedback voltage commensurate therewith, with a predetermined reference voltage; and a maximum duty controller that varies the maximum duty of the output transistor according to the reference voltage, the output voltage, or the feedback voltage.