公开(公告)号：US20210118880A1

公开(公告)日：2021-04-22

申请号：US16896423

申请日：2020-06-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin KIM ,  Jihye LEE ,  Sangmoon LEE ,  Seung Hun LEE

IPC: H01L27/092 ,  H01L29/161

Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.

公开(公告)号：US20250081559A1

公开(公告)日：2025-03-06

申请号：US18624201

申请日：2024-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunyoung LEE ,  Hyun-Kwan YU ,  Hyojin KIM

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern including a first semiconductor pattern and a second semiconductor pattern, a source/drain pattern connected to the first and second semiconductor patterns, and a gate electrode including an electrode between the first and second semiconductor patterns, and an insulating layer between the first and second semiconductor patterns and the electrode. The insulating layer includes a dielectric layer enclosing the electrode and a spacer on the dielectric layer. The spacer includes a horizontal portion between the dielectric layer and the second semiconductor pattern, a vertical portion between the dielectric layer and the source/drain pattern, and a corner portion connecting the horizontal portion to the vertical portion. A first thickness of the horizontal portion is smaller than a second thickness of the vertical portion, and the second thickness is smaller than a third thickness of the corner portion.

公开(公告)号：US20250040185A1

公开(公告)日：2025-01-30

申请号：US18596247

申请日：2024-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin KIM ,  Youngdae CHO ,  Sungkeun LIM

IPC: H01L29/417 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a substrate layer; a source/drain epitaxial layer between first channel layers and second channel layers; a backside contact structure electrically connected to the source/drain epitaxial layer, wherein the backside contact structure is between the source/drain epitaxial layer and a lower surface of the substrate layer, first width of the source/drain epitaxial layer at an upper surface of the substrate layer is greater than a second width at an interface between the source/drain epitaxial layer and the backside contact structure, a first portion of the backside contact structure is closer than a closest end of the source/drain epitaxial layer to the lower surface of the substrate layer, the first portion of the backside contact structure has a third width, and the third width is greater than the second width.

公开(公告)号：US20240304666A1

公开(公告)日：2024-09-12

申请号：US18667417

申请日：2024-05-17

Applicant: SAMSUNG ELECTRONICS CO, LTD.

Inventor： Jinbum KIM ,  Gyeom KIM ,  Hyojin KIM ,  Haejun YU ,  Seunghun LEE ,  Kyungin CHOI

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/0665 ,  H01L29/0653 ,  H01L29/6656 ,  H01L29/78618 ,  H01L29/78696

Abstract: An integrated circuit device is provided and includes: a fin-type active region extending in a first horizontal direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region and extending in a second horizontal direction crossing the first horizontal direction, an insulating spacer covering a sidewall of the gate line, a source/drain region connected to the channel region on the fin-type active region and including a first portion facing the sidewall of the gate line with the insulating spacer therebetween, an air gap between the insulating spacer and the first portion of the source/drain region, and an insulating liner including a portion in contact with the source/drain region and a portion defining a size of the air gap. A method of manufacturing the integrated circuit device is further provided.

公开(公告)号：US20240291941A1

公开(公告)日：2024-08-29

申请号：US18535019

申请日：2023-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juyeon LEE ,  Hyunjoo KANG ,  Hyojin KIM ,  Yeeun CHOI ,  Hoon HAN ,  Jiwoong HWANG

IPC: H04N5/74 ,  G06T7/62 ,  G06V10/141

CPC classification number: H04N5/74 ,  G06T7/62 ,  G06V10/141 ,  G06V2201/07

Abstract: In an electronic device according to an embodiment, the electronic device may include: an actuator configured to move the electronic device, a sensor, a projection assembly including light emitting circuitry, at least one processor, and a memory storing instructions. the instructions, when executed by one or more of the at least one processor, cause the electronic device to, in response to an input for playing a media content stored in the memory, identify an external object included in the media content. the instructions, when executed by one or more of the at least one processor, cause the electronic device to, in a first state in which an external object adjacent to the electronic device is identified, emit a light representing the media content, facing a direction adjacent to the external object, by controlling the projection assembly, based on data of the sensor. The present disclosure relates to a metaverse service for enhancing interconnectivity between a real object and a virtual object. For example, the metaverse service may be provided through a network based on fifth generation (5G) and/or sixth generation (6G).

公开(公告)号：US20230204249A1

公开(公告)日：2023-06-29

申请号：US17994679

申请日：2022-11-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunah KIM ,  Seonuk NA ,  Joonhyoung KIM ,  Hyojin KIM ,  Youngchal PARK ,  Hyeongjoon SEO ,  Youngtae SONG ,  Dongho CHO ,  Sungjune CHO

IPC: F24F13/08 ,  F24F6/02 ,  F24F13/20 ,  F24F13/24 ,  B01F23/10 ,  B01F23/70

CPC classification number: F24F13/08 ,  F24F6/025 ,  F24F13/20 ,  F24F13/24 ,  B01F23/12 ,  B01F23/711 ,  F24F2006/008

Abstract: A humidifying apparatus includes a water tank provided to hold water, a heating device configured to heat the water held in the water tank, a discharge chamber disposed above the water tank and including an outlet configured to discharge steam generated in the water tank due to the water being heated, a guide chamber between the water tank and the discharge chamber configured to guide the steam generated in the water tank into the discharge chamber, and a screen at a central portion of the guide chamber and spaced apart from an inner sidewall of the guide chamber to form a gap between the screen and the inner sidewall, so that the screen interferes with a flow of the steam guided by the guide chamber and allows the steam to flow through the gap to then be guided by the guide chamber into the discharge chamber.

公开(公告)号：US20220293730A1

公开(公告)日：2022-09-15

申请号：US17479424

申请日：2021-09-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinbum KIM ,  Gyeom KIM ,  Hyojin KIM ,  Haejun YU ,  Seunghun LEE ,  Kyungin CHOI

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/786

Abstract: An integrated circuit device includes: a fin-type active region extending in a first horizontal direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region and extending in a second horizontal direction crossing the first horizontal direction, an insulating spacer covering a sidewall of the gate line, a source/drain region connected to the channel region on the fin-type active region and including a first portion facing the sidewall of the gate line with the insulating spacer therebetween, an air gap between the insulating spacer and the first portion of the source/drain region, and an insulating liner including a portion in contact with the source/drain region and a portion defining a size of the air gap.

公开(公告)号：US20250118232A1

公开(公告)日：2025-04-10

申请号：US18774001

申请日：2024-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juyeon LEE ,  Hyojin KIM ,  Jeewoo NOH ,  Seungjoon LEE ,  Yeeun CHOI

IPC: G09G3/00 ,  G06T7/70 ,  G06V20/56 ,  G06V40/10 ,  G10L25/51

Abstract: An electronic device and a controlling method thereof are provided. The electronic device includes a driving part configured to drive the electronic device, a microphone configured to receive audio, a camera, a projection part configured to project an image, memory storing one or more computer programs, and one or more processors communicatively coupled to the driving part, the microphone, the camera, the projection part, and the memory, wherein the or more computer programs include computer-executable instructions that, when executed by the one or more one processor s individually or collectively, cause the electronic device to obtain information about audio generated by an object located in an indoor space through the microphone while travelling through the driving part, and obtain an image of the object through the camera, obtain information about expected audio related to the object based on the image of the object, and store information about the audio generated by the object and information about the expected audio on a map corresponding to the indoor space, based on sound being detected within the indoor space, identify an object related to the detected sound based on information about audio stored on the map, and control the projection part to project a message including information about the sound based on information about the related object and the sound.

公开(公告)号：US20250031412A1

公开(公告)日：2025-01-23

申请号：US18677236

申请日：2024-05-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin KIM ,  Donghoon HWANG ,  Myungil KANG

IPC: H01L29/417 ,  H01L23/528 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes gate structures on an insulation structure, the gate structures disposed in a second direction substantially parallel to an upper surface of the insulation structure, source/drain layers at opposite sides, respectively, of each gate structure in a first direction intersecting the second direction, semiconductor patterns disposed in a third direction substantially perpendicular to the upper surface of the insulation structure, the semiconductor patterns extending through each of the gate structures and contacting the source/drain layers, a first division pattern between the gate structures, and a connection pattern extending into and contacting an upper portion of the first division pattern and upper portions of the gate structures adjacent to the first division pattern, a lower surface of the connection pattern being lower than upper surfaces of the gate structures and an upper surface of the connection pattern being higher than the upper surfaces of the gate structures.

公开(公告)号：US20240258437A1

公开(公告)日：2024-08-01

申请号：US18510146

申请日：2023-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jisoo PARK ,  Donghoon HWANG ,  Inchan HWANG ,  Hyojin KIM ,  Jaehyoung LIM

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L29/78696 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775

Abstract: A 3D stacked FET may include a back-side wiring layer including a first back-side power line and a second back-side power line, a first FET on the back-side wiring layer, a second FET over the first FET, a front-side wiring layer over the second FET, a first through-electrode connecting the first FET to the second FET, and a second through-electrode connecting the front-side and back-side power lines. The front-side wiring layer may extend in a first direction and may include a front-side power line connected to the second back-side power line. The first FET and the second FET may share a gate extending in a second direction. Each of the first FET and the second FET may include a source and a drain respectively on both sides of the gate in the first direction, and a channel between the source and the drain and surrounded by the gate.