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    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230074880A1

    公开(公告)日：2023-03-09

    申请号：US17830884

    申请日：2022-06-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungil PARK ,  Jaehyun PARK ,  Hyo-Jin KIM ,  Hyojin KIM ,  Daewon HA

    IPC: H01L27/06 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L29/417 ,  H01L29/735 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8249

    Abstract: A semiconductor device includes a first device including first active regions and first to third structures thereon, and a second device including a second active region, a gate structure intersecting the second active region, and a source/drain region including a lower source/drain region on the second active region having first-type conductivity, an inter-source/drain region insulating layer on the lower source/drain region, and an upper source/drain region on the inter-source/drain region insulating layer and having second-type conductivity. The first structure includes first lower and upper impurity regions. The second structure includes a second lower impurity region having the first-type conductivity, an inter-impurity region insulating layer, and a second upper impurity region having the second-type conductivity. The third structure includes third lower and upper impurity regions having the second-type conductivity, the third upper impurity region having an impurity concentration higher than a that of the third lower impurity region.

    INTEGRATED CIRCUIT DEVICE
    4.
    发明申请
    INTEGRATED CIRCUIT DEVICE 有权

    公开(公告)号：US20230006040A1

    公开(公告)日：2023-01-05

    申请号：US17577088

    申请日：2022-01-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangmoon LEE ,  Jinbum KIM ,  Hyojin KIM ,  Yongjun NAM ,  Sujin JUNG

    IPC: H01L29/06 ,  H01L29/786 ,  H01L29/423

    Abstract: An integrated circuit (IC) device includes a fin-type active region extending on a substrate in a first lateral direction. A gate line extends on the fin-type active region in a second lateral direction. The second lateral direction intersects the first lateral direction. A channel region is between the substrate and the gate line. A source/drain region is adjacent to the gate line on the fin-type active region and has a sidewall facing the channel region. A superlattice barrier is between the substrate and the channel region. The superlattice barrier is in contact with the source/drain region. The superlattice barrier has a structure in which a plurality of first sub-layers including a semiconductor layer doped with oxygen atoms and a plurality of second sub-layers including an undoped semiconductor layer are alternately stacked.

    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250089314A1

    公开(公告)日：2025-03-13

    申请号：US18588089

    申请日：2024-02-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Donghoon HWANG ,  Hyojin KIM ,  Byungho MOON ,  Myungil KANG ,  Doyoung CHOI

    IPC: H01L29/06 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

    Abstract: A three-dimensional semiconductor device includes a first active region on a substrate, including a first active region on a substrate, including a lower channel pattern and lower source/drain patterns connected to the lower channel pattern, the lower channel pattern including a plurality of lower semiconductor patterns stacked and spaced apart from each other in a first direction that is perpendicular to an upper surface of the substrate, and the lower semiconductor patterns including a lowermost first semiconductor pattern, a second active region stacked on the first active region, including an upper channel pattern and an upper source/drain pattern connected to the upper channel pattern, a lower gate electrode on the lower channel pattern, and a lower insulating pattern under the first semiconductor pattern, the first semiconductor pattern spaced apart from the lower insulating pattern in the first direction. The lower gate electrode includes a first portion adjacent to a first sidewall of the lower insulating pattern and extending in the first direction from an upper surface to a bottom surface of the lower gate electrode, a second portion adjacent to a second sidewall of the lower insulating pattern and extending in the first direction from the upper surface to the bottom surface of the lower gate electrode, the second sidewall facing the first sidewall in a second direction which is perpendicular to the first direction, and a third portion in contact with a bottom surface of the lower insulating pattern and extending from the first portion to the second portion in the second direction.

    ROBOT AND CONTROLLING METHOD THEREOF
    6.
    发明公开
    ROBOT AND CONTROLLING METHOD THEREOF 审中-公开

    公开(公告)号：US20240066717A1

    公开(公告)日：2024-02-29

    申请号：US18321261

    申请日：2023-05-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yeeun CHOI ,  Hoon HAN ,  Jinah KONG ,  Hyojin KIM ,  Jiwoong HWANG ,  Seungjoon LEE

    IPC: B25J13/06

    CPC classification number: B25J13/06

    Abstract: A robot is provided. The robot includes a display, a memory storing identification information of the robot, a communication interface communicating with a server providing a virtual environment service, and at least one processor configured to, based on receiving a user input for interlocking the robot with the virtual environment service, transmit the identification information of the robot stored in the memory to the server through the communication interface, and based on receiving interaction information related to an avatar corresponding to the identification information of the robot from the server through the communication interface, control an operation of the robot based on the interaction information.

    SEMICONDUCTOR DEVICE
    8.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230246029A1

    公开(公告)日：2023-08-03

    申请号：US18133156

    申请日：2023-04-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyojin KIM ,  Jihye LEE ,  Sangmoon LEE ,  Seung Hun LEE

    IPC: H01L27/092 ,  H01L29/161

    CPC classification number: H01L27/092 ,  H01L29/161

    Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.

    SEMICONDUCTOR DEVICE
    9.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240014284A1

    公开(公告)日：2024-01-11

    申请号：US18195657

    申请日：2023-05-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seungmin SONG ,  Myungil KANG ,  Hyojin KIM ,  Doyoung CHOI

    IPC: H01L29/423 ,  H01L27/092 ,  H01L29/786 ,  H01L29/775 ,  H01L23/528 ,  H01L29/417 ,  H01L29/06

    CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L29/78696 ,  H01L29/775 ,  H01L23/5283 ,  H01L29/41775 ,  H01L29/0673

    Abstract: A semiconductor device includes an active region on a substrate; channel layers on the active region spaced apart from each other and including lower and upper channel layers; an intermediate insulating layer between an uppermost lower channel layer and a lowermost upper channel layer; a gate intersecting the active region and including a lower gate electrode surrounding the lower channel layers and an upper gate electrode surrounding the upper channel layers; an insulating pattern between the upper and lower gate electrodes on a side of the intermediate insulating layer; source/drain regions on at least one side of the gate, and including lower source/drain regions connected to the lower channel layers and upper source/drain regions connected to the upper channel layers; and a contact plug including a horizontal extension portion connected to the lower source/drain regions, and a vertical extension portion connected to the horizontal extension portion.

    AIR CONDITIONER
    10.
    发明公开
    AIR CONDITIONER 审中-公开

    公开(公告)号：US20230175709A1

    公开(公告)日：2023-06-08

    申请号：US17950767

    申请日：2022-09-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Donghyun KIM ,  Jinwoo HONG ,  Sungwoo KIM ,  Jinbaek KIM ,  Hyojin KIM ,  Jaehyoung SIM ,  Seonghyun YOON ,  Sungjune CHO

    IPC: F24F1/0018 ,  F24F1/0059

    CPC classification number: F24F1/0018 ,  F24F1/0059

    Abstract: An air conditioner including: a housing communicating with a space in which a window covering is installed, and including a suction port through which air is suctioned from the space and a discharge port through which air is discharged into an indoor area; a heat exchanger configured to exchange heat with the air suctioned through the suction port; a blower fan allowing air to be suctioned through the suction port or allowing air to be discharged through the discharge port; and a guide panel provided at the suction port to guide the window covering to prevent the window covering from covering the suction port.

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