公开(公告)号：US20210006251A1

公开(公告)日：2021-01-07

申请号：US16918083

申请日：2020-07-01

Applicant: Seiko Epson Corporation

Inventor： Yosuke ITASAKA ,  Naoki II ,  Takashi NOMIYA

IPC: H03L1/04 ,  H05K1/02 ,  H03B5/04

Abstract: An integrated circuit device includes a temperature sensor, a heat generation source circuit serving as a heat generation source, a pad for external coupling, and a capacitor having the MIM structure in which one electrode is electrically coupled to the pad for external coupling. In a plan view orthogonal to the substrate on which a circuit element is formed, the capacitor having the MIM structure and the temperature sensor overlap.

公开(公告)号：US20180278259A1

公开(公告)日：2018-09-27

申请号：US15924835

申请日：2018-03-19

Applicant: Seiko Epson Corporation

Inventor： Naoki II ,  Noriyuki MURASHIMA

IPC: H03L7/099 ,  H03L7/081 ,  H03L7/091 ,  G01P21/00 ,  G01C19/5614 ,  G01P15/14

CPC classification number: H03L7/0995 ,  G01C19/5614 ,  G01C19/5776 ,  G01P15/097 ,  G01P15/14 ,  G01P21/00 ,  H03L7/081 ,  H03L7/091

Abstract: A circuit device includes a drive circuit configured to drive a physical quantity transducer by a drive signal, a PLL circuit configured to generate a clock signal by using a drive signal as a reference signal, and a measurement circuit that includes a circuit which is operated by an operation signal based on the clock signal and performs measurement processing based on a measurement signal from the physical quantity transducer, and the PLL circuit generates the clock signal having a frequency of j×fdr≠fck/i in a case where it is set that a frequency of the drive signal is fdr, a frequency of the clock signal is fck, i is an integer of 1 or more, j is an integer of 1 or more, and a frequency of the operation signal is fck/i.

公开(公告)号：US20150160012A1

公开(公告)日：2015-06-11

申请号：US14564554

申请日：2014-12-09

Applicant: Seiko Epson Corporation

Inventor： Naoki II ,  Katsuhiko MAKI ,  Takashi KURASHINA

IPC: G01C19/5776 ,  H03L7/097 ,  G01D5/12 ,  H03L7/087

CPC classification number: G01C19/5776 ,  G01C19/5614 ,  G01D5/12 ,  H03B5/364 ,  H03L7/0814 ,  H03L7/0816

Abstract: A detection device includes a drive circuit of a physical quantity transducer, a synchronization signal output circuit, and a detection circuit that performs detection of a physical quantity signal based on a physical quantity. The synchronization signal output circuit includes a delay locked loop (DLL) circuit that includes: a delay control circuit that outputs a delay control signal and a delay circuit that includes a plurality of delay units in which a delay time is controlled by the delay control signal; an adjustment circuit that includes at least one delay unit in which a delay time is controlled by the delay control signal, and outputs a signal obtained by delaying an input signal based on the output signal from the drive circuit to the DLL circuit; and an output circuit that outputs the synchronization signal based on multi-phase clock signals from the DLL circuit.

Abstract translation: 检测装置包括物理量转换器的驱动电路，同步信号输出电路和基于物理量进行物理量信号的检测的检测电路。 同步信号输出电路包括延迟锁定环（DLL）电路，其包括：延迟控制电路，其输出延迟控制信号和延迟电路，延迟电路包括多个延迟单元，其中延迟时间由延迟控制信号 ; 调整电路，其包括至少一个延迟单元，延迟时间由延迟控制信号控制，并且根据来自驱动电路的输出信号向DLL电路输出将输入信号延迟得到的信号; 以及输出电路，其根据来自DLL电路的多相时钟信号输出同步信号。