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公开(公告)号：US20150160012A1
公开(公告)日：2015-06-11
申请号：US14564554
申请日：2014-12-09
Applicant: Seiko Epson Corporation
Inventor： Naoki II , Katsuhiko MAKI , Takashi KURASHINA
IPC: G01C19/5776 , H03L7/097 , G01D5/12 , H03L7/087
CPC classification number: G01C19/5776 , G01C19/5614 , G01D5/12 , H03B5/364 , H03L7/0814 , H03L7/0816
Abstract: A detection device includes a drive circuit of a physical quantity transducer, a synchronization signal output circuit, and a detection circuit that performs detection of a physical quantity signal based on a physical quantity. The synchronization signal output circuit includes a delay locked loop (DLL) circuit that includes: a delay control circuit that outputs a delay control signal and a delay circuit that includes a plurality of delay units in which a delay time is controlled by the delay control signal; an adjustment circuit that includes at least one delay unit in which a delay time is controlled by the delay control signal, and outputs a signal obtained by delaying an input signal based on the output signal from the drive circuit to the DLL circuit; and an output circuit that outputs the synchronization signal based on multi-phase clock signals from the DLL circuit.
Abstract translation: 检测装置包括物理量转换器的驱动电路，同步信号输出电路和基于物理量进行物理量信号的检测的检测电路。 同步信号输出电路包括延迟锁定环（DLL）电路，其包括：延迟控制电路，其输出延迟控制信号和延迟电路，延迟电路包括多个延迟单元，其中延迟时间由延迟控制信号 ; 调整电路，其包括至少一个延迟单元，延迟时间由延迟控制信号控制，并且根据来自驱动电路的输出信号向DLL电路输出将输入信号延迟得到的信号; 以及输出电路，其根据来自DLL电路的多相时钟信号输出同步信号。
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公开(公告)号：US20190006989A1
公开(公告)日：2019-01-03
申请号：US16021458
申请日：2018-06-28
Applicant: Seiko Epson Corporation
Inventor： Akio TSUTSUMI , Takashi KURASHINA , Fumikazu KOMATSU
Abstract: A resonator device includes first and second resonators and an integrated circuit device. The integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator, a second oscillation circuit configured to oscillate the second resonator, and a processing circuit configured to perform processing by using frequency difference information or frequency comparison information between a first clock signal generated by oscillating the first resonator and a second clock signal generated by oscillating the second resonator. The first resonator is supported on the integrated circuit device by a first support portion. The second resonator is supported on the integrated circuit device by a second support portion.
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公开(公告)号：US20180091156A1
公开(公告)日：2018-03-29
申请号：US15715607
申请日：2017-09-26
Applicant: Seiko Epson Corporation
Inventor： Katsuhiko MAKI , Hideo HANEDA , Takashi KURASHINA , Akio TSUTSUMI , Yasuhiro SUDO
CPC classification number: G04F10/005 , H03B5/362 , H03B5/368 , H03L7/085 , H03L7/099 , H03L7/18 , H03L7/23
Abstract: An integrated circuit device includes: a first oscillation circuit that oscillates a first resonator to generate a first clock signal with a first clock frequency; a second oscillation circuit that oscillates a second oscillation element to generate a second clock signal with a second clock frequency that is different from the first clock frequency; and a time-to-digital conversion circuit that converts a time into a digital value using the first and second clock signals.
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公开(公告)号：US20190007027A1
公开(公告)日：2019-01-03
申请号：US16021092
申请日：2018-06-28
Applicant: Seiko Epson Corporation
Inventor： Akio TSUTSUMI , Takashi KURASHINA , Fumikazu KOMATSU
Abstract: A resonator device includes first and second resonators and an integrated circuit. The integrated circuit includes first and second oscillation circuits that oscillate first and second resonators, first and second terminals connected to the first oscillation circuit, and third and fourth terminals connected to the second oscillation circuit. The first terminal of the integrated circuit and one electrode of the first resonator are connected to each other via a bump. The third terminal and one electrode of the second resonator are connected to each other via a bump. In a plan view, at least a portion of the first resonator overlaps the first oscillation circuit and at least a portion of the second resonator overlaps the second oscillation circuit.
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5.发明申请公开(公告)号：US20180239307A1
公开(公告)日：2018-08-23
申请号：US15901044
申请日：2018-02-21
Applicant: Seiko Epson Corporation
Inventor： Akio TSUTSUMI , Takashi KURASHINA , Katsuhiko MAKI
CPC classification number: G04F10/005 , A61B8/5207 , B60R16/02 , G01S7/4865 , G01S15/14 , G01S17/936 , H03B5/32 , H03B5/362 , H03B5/368 , H03L7/087 , H03L7/099 , H03L7/23 , H03L2207/50
Abstract: A circuit device includes a first PLL circuit to which a first clock signal having a first clock frequency generated using a first resonator and a reference clock signal are input, and which performs phase synchronization between the first clock signal and the reference clock signal, a second PLL circuit to which a second clock signal generated using a second resonator and having a second clock frequency different from the first clock frequency and the reference clock signal are input, and which performs phase synchronization between the second clock signal and the reference clock signal, and a time-to-digital conversion circuit adapted to convert time into a digital value using the first clock signal and the second clock signal.
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Patent Agency Ranking
公开(公告)号：US20180088160A1
公开(公告)日：2018-03-29
申请号：US15715719
申请日：2017-09-26
Applicant: Seiko Epson Corporation
Inventor： Katsuhiko MAKI , Hideo HANEDA , Takashi KURASHINA , Akio TSUTSUMI , Yasuhiro SUDO
CPC classification number: G01R23/10 , G01R23/12 , G01R29/02 , G04F10/005 , G04F10/04 , H03K21/023
Abstract: A physical quantity measurement apparatus includes a first resonator, a second oscillator, and an integrated circuit device. The integrated circuit device includes a first oscillation circuit that causes the first resonator to oscillate, and thus generate a first clock signal having a first clock frequency, a second oscillation circuit that causes the second oscillator to oscillate, and thus generate a second clock signal having a second clock frequency which is different from the first clock frequency, and a measurement unit that is provided with a time-to-digital conversion circuit which converts time into a digital value by using the first clock signal and the second clock signal.
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7.发明申请公开(公告)号：US20180091158A1
公开(公告)日：2018-03-29
申请号：US15715458
申请日：2017-09-26
Applicant: Seiko Epson Corporation
Inventor： Yasuhiro SUDO , Katsuhiko MAKI , Hideo HANEDA , Akio TSUTSUMI , Takashi KURASHINA
CPC classification number: H03L7/087 , G04F10/005 , H03L7/18 , H03L7/23
Abstract: A circuit device includes: a time-to-digital conversion circuit to which a first clock signal with a first clock frequency and a second clock signal with a second clock frequency different from the first clock frequency are input and that converts a time difference in transition timings of first and second signals into a digital value; and a synchronization circuit that synchronizes phases of the first and second clock signals. The time-to-digital conversion circuit calculates the digital value corresponding to the time difference by transitioning a signal level of the first signal based on the first clock signal after a phase synchronization timing of the first and second clock signals and compares the phase of the second clock signal to a phase of the second signal having a signal level is transitioned to correspond to the first signal.
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8.发明申请公开(公告)号：US20180088536A1
公开(公告)日：2018-03-29
申请号：US15712879
申请日：2017-09-22
Applicant: Seiko Epson Corporation
Inventor： Takashi KURASHINA , Katsuhiko MAKI
CPC classification number: G04F10/005 , B60L2200/00 , H03L7/093 , H03L7/0992 , H03L7/18 , H03L7/181
Abstract: A circuit device includes a time-to-digital conversion circuit, to which a first clock signal generated using a first resonator, and having a first clock frequency, and a second clock signal generated using a second resonator, and having a second clock frequency different from the first clock frequency are input, and which converts time into a digital value using the first and second clock signals, and a PLL circuit adapted to perform phase synchronization between the first and second clock signals.
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公开(公告)号：US20170122739A1
公开(公告)日：2017-05-04
申请号：US15340278
申请日：2016-11-01
Applicant: Seiko Epson Corporation
Inventor： Takashi KURASHINA , Katsuhiko MAKI , Hideo HANEDA
IPC: G01C19/5776 , G01C21/12
CPC classification number: G01C19/5776 , G01C21/12 , G01C21/16 , G01C21/206
Abstract: A detection apparatus includes a first sensor for detecting rotation information of a wheel of a moving object; a second sensor for detecting angular velocity information of a rotation in a yaw axis of the wheel or angular information as yaw rotation information; and a storage unit for storing the rotation information and the yaw rotation information to be output to a processing unit for obtaining positional information of the moving object based on the rotation information and the yaw rotation information.
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公开(公告)号：US20160294397A1
公开(公告)日：2016-10-06
申请号：US15082319
申请日：2016-03-28
Applicant: Seiko Epson Corporation
Inventor： Hideo HANEDA , Takashi KURASHINA , Katsuhiko MAKI , Yasuhiro SUDO
Abstract: A circuit device includes a drive circuit that drives a physical quantity transducer, an FLL circuit that includes a frequency comparator and an oscillator, and generates a clock signal with a signal from the drive circuit as a reference clock signal, and a detection circuit that includes a circuit operated based on the clock signal, and performs detection processing on a detection signal from the physical quantity transducer.
Abstract translation: 电路装置包括驱动物理量传感器的驱动电路，包括频率比较器和振荡器的FLL电路，并且产生具有来自驱动电路的信号的时钟信号作为参考时钟信号，以及检测电路，其包括 基于时钟信号操作的电路，并且对来自物理量传感器的检测信号执行检测处理。
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