公开(公告)号：US20230154865A1

公开(公告)日：2023-05-18

申请号：US17572001

申请日：2022-01-10

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chao-Chiang Pu ,  Chi-Ching Ho ,  Yi-Min Fu ,  Yu-Po Wang ,  Po-Yuan Su

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L23/58

CPC classification number: H01L23/562 ,  H01L23/49822 ,  H01L23/367 ,  H01L23/3107 ,  H01L21/4882 ,  H01L23/585

Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.

公开(公告)号：US20230111192A1

公开(公告)日：2023-04-13

申请号：US17527434

申请日：2021-11-16

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yi-Min Fu ,  Chi-Ching Ho ,  Cheng-Yu Kang ,  Yu-Po Wang

IPC: H01L23/498 ,  H01L23/367 ,  H01L21/48

Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.

公开(公告)号：US20150050782A1

公开(公告)日：2015-02-19

申请号：US14531226

申请日：2014-11-03

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chia-Yin Chen ,  Yu-Ching Liu ,  Yueh-Chiung Chang ,  Yu-Po Wang

IPC: H01L23/00

CPC classification number: H01L24/03 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/03462 ,  H01L2224/03552 ,  H01L2224/0381 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/27013 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.

Abstract translation: 提供了使用封装基板的封装基板和半导体封装。 封装基板包括：具有管芯附着区域的基板主体，形成在管芯附着区域周围的电路层，并且具有多个导线，每个导线具有引线焊盘，以及形成在引线接合焊盘上的表面处理层。 其中，仅有一个导电迹线连接到电镀线，以便防止由于现有技术中的电镀线太多导致的导电迹线之间的串扰。