Gate driving circuit and display module

    公开(公告)号:US10013943B2

    公开(公告)日:2018-07-03

    申请号:US15860646

    申请日:2018-01-02

    CPC classification number: G09G3/3677 G09G2310/0289

    Abstract: A gate driving circuit for providing a scan signal to a LCD panel is disclosed. The gate driving circuit includes a positive level shifter, a capacitive coupling level shifter, a P-type transistor and an N-type transistor. The positive level shifter shifts up a gate control signal to generate a first control signal. The capacitive coupling level shifter shifts up and down the first control signal to generate positive and negative control signals. The P-type transistor P-type transistor receives the negative control signal and a negative power voltage. The N-type transistor receives the negative control signal and a negative power voltage. An absolute value of a voltage difference between the positive power voltage and the positive control signal and an absolute value of a voltage difference between the negative power voltage and the negative control signal are less than a medium voltage device endurance limit.

    Power circuit, gate driving circuit and display module

    公开(公告)号:US09837891B2

    公开(公告)日:2017-12-05

    申请号:US14883650

    申请日:2015-10-15

    Inventor: Min-Nan Liao

    CPC classification number: H02M3/07 G09G2330/021

    Abstract: A power circuit includes a first charge pump for converting a supply voltage into a first high voltage and a first low voltage, at least one second charge pump, each for increasing the first high voltage by a first variance value to a second high voltage, and at least one third charge pump, each for decreasing the first low voltage by a second variance value to a second low voltage. A difference between the first high and low voltages is less than a breakdown threshold. The second and third variance margins are less than the breakdown threshold.

    Voltage Calibration Circuit And Related Liquid Crystal Display Device
    14.
    发明申请
    Voltage Calibration Circuit And Related Liquid Crystal Display Device 有权
    电压校准电路及相关液晶显示装置

    公开(公告)号:US20150054810A1

    公开(公告)日:2015-02-26

    申请号:US14259167

    申请日:2014-04-23

    CPC classification number: G09G3/3696 G09G3/3655 G09G2310/06 G09G2320/02

    Abstract: The present disclosure provides a voltage calibration circuit. The voltage calibration circuit includes a coupling voltage detection circuit and a common voltage circuit. The coupling voltage detection circuit is used for detecting a coupling voltage in an initial phase and generating a compensation voltage according to the coupling voltage. The common voltage circuit is used for adjusting a common voltage according to the compensation voltage and outputting the common voltage to a display module in a display phase.

    Abstract translation: 本公开提供了一种电压校准电路。 电压校准电路包括耦合电压检测电路和公共电压电路。 耦合电压检测电路用于检测初始相位中的耦合电压,并根据耦合电压产生补偿电压。 公共电压电路用于根据补偿电压调节公共电压,并在显示阶段将公共电压输出到显示模块。

    Power supply system and display apparatus

    公开(公告)号:US10270333B2

    公开(公告)日:2019-04-23

    申请号:US14825191

    申请日:2015-08-13

    Inventor: Min-Nan Liao

    Abstract: A power supply system includes a control module for generating a control signal; a first charging pump module, coupled to the control module, for generating an adjustment charging value according to the control signal, and outputting a charging voltage according to the adjustment charging value and a conduction voltage source; an amplifying module, coupled to the first charging pump module, for utilizing the charging voltage to generate an amplifying voltage; and a load module, coupled to the amplifying module, for processing a dynamic charging operation according to the amplifying voltage.

    Power supply module, display device and related method of switching capacitors

    公开(公告)号:US10121428B2

    公开(公告)日:2018-11-06

    申请号:US14592913

    申请日:2015-01-09

    Abstract: A power supply module includes a source driver power supply circuit, a gate driver power supply circuit, a first capacitor group, a second capacitor group and a switch module. The source driver power supply circuit and the gate driver power supply circuit are utilized for driving a source driver and a gate driver of a display device, respectively. The first capacitor group includes at least one first storage capacitor for storing electric charges for driving source driving signals, and at least one first flying capacitor. The second capacitor group includes at least one second storage capacitor for storing electric charges for driving gate driving signals, and at least one second flying capacitor. The switch module is utilized for switching the first capacitor group to be used for the gate driver power supply circuit or switching the second capacitor group to be used for the source driver power supply circuit.

    Transmission interface, transmission method, and driving circuit thereof, and display device and electronic device

    公开(公告)号:US09870725B2

    公开(公告)日:2018-01-16

    申请号:US13982545

    申请日:2013-01-18

    CPC classification number: G09G3/02 G06F3/14 G09G2310/08 G09G2352/00

    Abstract: The present invention relates to a transmission interface. A display device comprises a driving circuit and a transmission interface. The transmission method of the transmission interface is that a first input is used for receiving a first data string; a second input is used for receiving a second data string; and the processing unit receives the first and second data strings. The first data string has a first identification bit and a plurality of first information bits. The second data string has a plurality of second information bits. The processing unit identifies either to write a plurality of parameters or a plurality of data to a storage circuit or to read the stored content from the storage circuit according to the first identification bit and the plurality of first information bits. The processing circuit further writes or reads the storage circuit according to the plurality of second information bits.

    GATE DRIVER AND RELATED CIRCUIT BUFFER
    19.
    发明申请
    GATE DRIVER AND RELATED CIRCUIT BUFFER 有权
    门控驱动器和相关电路缓冲器

    公开(公告)号:US20150200670A1

    公开(公告)日:2015-07-16

    申请号:US14460346

    申请日:2014-08-14

    Inventor: Min-Nan Liao

    Abstract: A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively.

    Abstract translation: 用于输出具有大于电路缓冲器中的任何电路元件的耐受电压的电压信号的电路缓冲器包括第一晶体管和第二晶体管。 第一晶体管包括分别电连接到电路缓冲器的输入端子和输出端子的第一端子和第二端子,电连接到第一电源端子的第三端子和电连接到第一端子的第三端子的第四端子 第一个晶体管。 第二晶体管包括分别电连接到电路缓冲器的输入端子和输出端子的第一端子和第二端子,电连接到第二电源端子的第三端子和电连接到第二端子的第三端子 第二晶体管。 第一和第二电源端子的电压分别在两个不同的电平之间切换。

    Gate Driving Circuit and Display Module
    20.
    发明申请

    公开(公告)号:US20180130436A1

    公开(公告)日:2018-05-10

    申请号:US15860646

    申请日:2018-01-02

    CPC classification number: G09G3/3677 G09G2310/0289

    Abstract: A gate driving circuit for providing a scan signal to a LCD panel is disclosed. The gate driving circuit includes a positive level shifter, a capacitive coupling level shifter, a P-type transistor and an N-type transistor. The positive level shifter shifts up a gate control signal to generate a first control signal. The capacitive coupling level shifter shifts up and down the first control signal to generate positive and negative control signals. The P-type transistor P-type transistor receives the negative control signal and a negative power voltage. The N-type transistor receives the negative control signal and a negative power voltage. An absolute value of a voltage difference between the positive power voltage and the positive control signal and an absolute value of a voltage difference between the negative power voltage and the negative control signal are less than a medium voltage device endurance limit.

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