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公开(公告)号:US11740136B2
公开(公告)日:2023-08-29
申请号:US17011723
申请日:2020-09-03
Applicant: STMicroelectronics S.r.l.
Inventor: Michele Vaiana , Paolo Pesenti , Mario Chiricosta , Calogero Marco Ippolito , Mario Maiore
IPC: G01K3/14 , H03H17/02 , G01K7/02 , H03M3/00 , H03K19/003 , H03K19/018
CPC classification number: G01K3/14 , G01K7/02 , G01K7/021 , H03H17/02 , G01K2219/00 , H03K19/00307 , H03K19/01825 , H03M3/43 , H03M3/456 , H03M3/458
Abstract: A circuit includes a first input terminal, a second input terminal, a third input terminal and an output terminal. A first summation node adds signals at the first and third input terminals. A second summation node subtracts signals at the second and third input terminals. A selector selects between the added signals and subtracted signals in response to a selection signal. The output of the selector is integrated to generate an integrated signal. The integrated signal is compared by a comparator to a threshold, the comparator generating an output signal at the output terminal having a first level and a second level. Feedback of the output signal produces the selection signal causing the selector to select the added signals in response to the first level of the output signal and causing the selector to select the subtracted signals in response to the second level of the output signal.
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12.
公开(公告)号:US20180274924A1
公开(公告)日:2018-09-27
申请号:US15919874
申请日:2018-03-13
Applicant: STMicroelectronics S.r.l.
Inventor: Alessandro Mecchia , Matteo Quartiroli , Paolo Pesenti
IPC: G01C19/5776 , G01C19/5712
CPC classification number: G01C19/5776 , B81B7/00 , B81B7/008 , B81B2201/0242 , G01C19/5712 , H04L27/3863
Abstract: A demodulator demodulates an in-phase component of an input signal which is in-phase and quadrature modulated. The demodulator includes a register storing a phase calibration value having an integer part and a fractional part. A noise-shaping modulator generates a succession of quantized values of integer type, the quantized values having a mean equal to the phase calibration value. A generating stage generates a demodulating signal phase locked with the input signal, the demodulating signal having a phase which depends linearly on the quantized values. A demodulating stage demodulates the input signal by means of the demodulating signal.
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