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238 条记录 (耗时 0.026 秒)

    Phase and amplitude detection in wireless energy transfer systems
    1.
    发明授权
    Phase and amplitude detection in wireless energy transfer systems 有权

    公开(公告)号：US09929721B2

    公开(公告)日：2018-03-27

    申请号：US15291187

    申请日：2016-10-12

    申请人： WiTricity Corporation

    发明人： Curt Karnstedt

    IPC分类号： H03H17/02 ,  H02J50/12 ,  H02J7/02 ,  H03H17/00 ,  G01R25/00 ,  G01R25/04

    CPC分类号： H03H17/02 ,  G01R25/00 ,  G01R25/04 ,  H02J7/025 ,  H02J50/12 ,  H03H17/0045

    摘要： Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for detecting characteristics of an input signal. One aspect includes a first finite impulse response (FIR) filter, a second FIR filter, and a controller coupled with the first and second FIR filters. The first FIR filter receives an input signal and a first reference signal. The first FIR filter filters the first reference signal to generate a first sinusoidal signal and mixes the first sinusoidal signal and the input signal to generate a first mixed signal. The second FIR filter receives the input signal and a second reference signal. The second FIR filter filters the second reference signal to generate a second sinusoidal signal and mixes the second sinusoidal signal and the input signal to generate a second mixed signal. The controller determines characteristics of the input signal based on the first and second mixed signals.

    DEVICE AND METHOD OF MEDIAN FILTERING
    2.
    发明申请
    DEVICE AND METHOD OF MEDIAN FILTERING 审中-公开

    公开(公告)号：US20170315748A1

    公开(公告)日：2017-11-02

    申请号：US15531415

    申请日：2015-11-30

    申请人： SHANGHAI IC R&D CENTER CO., LTD. ,  CHENGDU LIGHT COLLECTOR TECHNOLOGY CO., LTD.

    发明人： Dongmei Lei

    IPC分类号： G06F3/06 ,  H03H17/02

    CPC分类号： G06F3/0638 ,  G06F3/0604 ,  G06F3/0656 ,  G06F3/0673 ,  H03H17/02 ,  H03H17/0263 ,  H04N19/42 ,  H04N19/80

    摘要： A median filter device is provided with a reordered circuit, a comparison circuit and a data refresh circuit on the basis of the conventional data buffer circuit and data register circuit. The reorder circuit re-sorts the signal data stored in the data buffer circuit in a preceding clock cycle according to their numerical values. The comparison circuit compares the new signal datum entered in the current clock cycle with the signal data already stored to generate a median. The data refresh circuit updates the signal codes stored in the data register circuit with the signal codes corresponding to the new signal data, for calculation of the median in a following clock cycle. The length of the data buffer circuit and data register circuit can be reduced from N signal data to N-1 signal data, which achieves less data storage capacity, smaller circuit area, easier data processing and higher operation efficiency.

    PHASE AND AMPLITUDE DETECTION IN WIRELESS ENERGY TRANSFER SYSTEMS
    3.
    发明申请
    PHASE AND AMPLITUDE DETECTION IN WIRELESS ENERGY TRANSFER SYSTEMS 有权

    公开(公告)号：US20170111029A1

    公开(公告)日：2017-04-20

    申请号：US15291187

    申请日：2016-10-12

    申请人： WiTricity Corporation

    发明人： Curt Karnstedt

    IPC分类号： H03H17/02 ,  H02J7/02 ,  H03H17/00 ,  H02J50/12

    CPC分类号： H03H17/02 ,  G01R25/00 ,  G01R25/04 ,  H02J7/025 ,  H02J50/12 ,  H03H17/0045

    摘要： Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for detecting characteristics of an input signal. One aspect includes a first finite input response (FIR) filter, a second FIR filter, and a controller coupled with the first and second FIR filters. The first FIR filter receives an input signal and a first reference signal. The first FIR filter filters the first reference signal to generate a first sinusoidal signal and mixes the first sinusoidal signal and the input signal to generate a first mixed signal. The second FIR filter receives the input signal and a second reference signal. The second FIR filter filters the second reference signal to generate a second sinusoidal signal and mixes the second sinusoidal signal and the input signal to generate a second mixed signal. The controller determines characteristics of the input signal based on the first and second mixed signals.

    Filter circuit, integrated circuit including the same, and signal filtering method
    4.
    发明授权
    Filter circuit, integrated circuit including the same, and signal filtering method 有权
    滤波电路，集成电路包括相同的信号滤波方法

    公开(公告)号：US08421530B2

    公开(公告)日：2013-04-16

    申请号：US13078339

    申请日：2011-04-01

    申请人： Ji-Wang Lee ,  Shin-Deok Kang

    发明人： Ji-Wang Lee ,  Shin-Deok Kang

    IPC分类号： H03K5/00

    CPC分类号： H03H17/02

    摘要： A filter circuit includes a filtering unit configured to filter an input signal and generate an output signal, and a weight generation unit configured to monitor a variation of the output signal and generate weight information based on the monitored variation.

    摘要翻译： 滤波器电路包括：滤波单元，被配置为滤波输入信号并产生输出信号;以及权重生成单元，被配置为基于所监视的变化来监视输出信号的变化并生成权重信息。

    DATA PROCESSING APPARATUS
    5.
    发明申请
    DATA PROCESSING APPARATUS 有权
    数据处理设备

    公开(公告)号：US20120203942A1

    公开(公告)日：2012-08-09

    申请号：US13367490

    申请日：2012-02-07

    申请人： Tomonori Yonemoto ,  Hideru Ikeda ,  Keisuke Nakazono

    发明人： Tomonori Yonemoto ,  Hideru Ikeda ,  Keisuke Nakazono

    IPC分类号： G06F3/00

    CPC分类号： H03H17/02 ,  G06F5/10 ,  G06F5/16 ,  G06F13/28 ,  H03H2017/0298

    摘要： A data processing apparatus may include a data acquisition unit, a buffer unit that includes a plurality of division buffers, a valid data area determination unit that calculates an area of valid data, a buffer state management unit that manages whether or not the data is stored in the division buffer, a data write control unit that writes data of a unit of the storage capacity of the division buffer, which at least includes data indicated to be valid data by the valid data information within the data, to the division buffer in which no data is stored, the division buffer being selected based on the management information, and a data read control unit that reads data indicated to be valid data by the valid data information from the division buffer in which data is stored, the division buffer being selected based on the management information.

    摘要翻译： 数据处理装置可以包括数据获取单元，包括多个分割缓冲器的缓冲单元，计算有效数据区域的有效数据区域确定单元，管理数据是否被存储的缓冲器状态管理单元 在分割缓冲器中，数据写入控制单元将至少包括由数据中的有效数据信息指示为有效数据的数据的划分缓冲器的存储容量的单位的数据写入到其中，其中 不存储数据，基于管理信息选择分割缓冲器，以及数据读取控制单元，其从存储数据的分割缓冲器读取由有效数据信息指示为有效数据的数据，选择分割缓冲器 基于管理信息。

    Spectrum analyzer having a resolution filter that can be adjusted via phase-variation parameter
    7.
    发明授权
    Spectrum analyzer having a resolution filter that can be adjusted via phase-variation parameter 有权
    频谱分析仪具有可通过相位变化参数调整的分辨率滤波器

    公开(公告)号：US07501807B2

    公开(公告)日：2009-03-10

    申请号：US10580162

    申请日：2004-11-11

    申请人： Kurt Schmidt

    发明人： Kurt Schmidt

    IPC分类号： G01R23/00 ,  G01R13/24 ,  G01R23/165

    CPC分类号： H03H17/02 ,  G01R23/173

    摘要： A spectrum analyzer is described which comprises a mixer for mixing the conjugate complex input signal v*(t) into a base band signal x(t), and a resolution filter for narrow-band filtering the base band signal. The resolution filter has a complex, discrete impulse response using a variation parameter k0 set to compensate for the frequency overshoot determined by the group delay of the resolution filter.

    摘要翻译： 描述了一种频谱分析仪，其包括用于将共轭复合输入信号v *（t）混合到基带信号x（t）中的混频器和用于对基带信号进行窄带滤波的分辨率滤波器。 分辨率滤波器具有使用变化参数k0设置的补偿由分辨率滤波器的组延迟确定的频率超调的复杂的离散脉冲响应。

    Method and device for digital filtering of interpolated values
    9.
    发明申请
    Method and device for digital filtering of interpolated values 有权
    用于内插值数字滤波的方法和装置

    公开(公告)号：US20050249320A1

    公开(公告)日：2005-11-10

    申请号：US10650565

    申请日：2003-08-27

    申请人： Mario Traber

    发明人： Mario Traber

    IPC分类号： H03H17/02 ,  H03M7/30 ,  H03M7/46 ,  H04L27/26 ,  H04B1/10

    CPC分类号： H03M7/46 ,  H03H17/02 ,  H03M7/30 ,  H04L27/2662

    摘要： In the digital filtering of an input signal (3), which has been produced by interpolation of a pilot signal (2), under certain circumstances numerous values originating from the past have to be stored. In order to reduce the storage space required for these and the associated power consumption, the values of the input signal (3), which are needed for computation of the values of an output signal (4), are compressed and stored in compressed form. More particularly here the values of the input signal (3) are divided into symbol periods, in which a coherent range of memory values, which are the only data-carrying values in the symbol period, occurs in each case. These values are stored together with the length of the symbol period, so that although each symbol period can be described completely, storage space is reduced. The values to be stored can be seamlessly stored in a FIFO memory, whereby an address is determined as a function of the length of the symbol periods, under which the desired value can be accessed in the FIFO memory. If the computing specifications of the digital filter require that a non-data carrying value, which is not stored in the FIFO memory has to be accessed, this value is reconstructed, and in particular the data-carrying value immediately preceding in the time sequence and therefore having been input in the FIFO memory, is used.

    摘要翻译： 在通过导频信号（2）的内插产生的输入信号（3）的数字滤波中，在某些情况下，必须存储来自过去的许多值。 为了减少这些所需的存储空间和相关的功耗，计算输出信号（4）的值所需的输入信号（3）的值被压缩并以压缩形式存储。 更具体地，输入信号（3）的值被划分为符号周期，其中在每种情况下都发生作为符号周期中唯一的数据携带值的存储器值的相干范围。 这些值与符号周期的长度一起存储，使得尽管可以完全描述每个符号周期，但是减少了存储空间。 要存储的值可以无缝地存储在FIFO存储器中，由此根据符号周期的长度确定地址，在FIFO存储器中可以访问期望值。 如果数字滤波器的计算规范要求必须访问不存储在FIFO存储器中的非数据携带值，则重建该值，特别是在时间序列中紧接在前的数据携带值，以及 因此已被输入到FIFO存储器中。

    FILTER SET FOR FREQUENCY ANALYSIS
    10.
    发明申请
    FILTER SET FOR FREQUENCY ANALYSIS 审中-公开
    频率分析滤波器

    公开(公告)号：US20050228518A1

    公开(公告)日：2005-10-13

    申请号：US10074991

    申请日：2002-02-13

    申请人： Lloyd Watts

    发明人： Lloyd Watts

    IPC分类号： H03H17/02 ,  H03H17/04 ,  G06F17/00

    CPC分类号： H03H17/02 ,  G10L25/18 ,  H03H17/04

    摘要： A system and method are disclosed for analyzing an input signal into a plurality of frequency components. In one embodiment, the input signal is processed with a first set of low pass filters to derive a first set of frequency components wherein the first set of low pass filters are arranged serially in a chain having a first low pass filter and a last low pass filter, the output of each low pass filter being fed to the next low pass filter in the chain until the last low pass filter. The output of the last low pass filter is downsampled to produce a downsampled signal. The downsampled signal is processed with a second set of low pass filters to derive a second set of frequency components.

    摘要翻译： 公开了一种用于将输入信号分解为多个频率分量的系统和方法。 在一个实施例中，输入信号用第一组低通滤波器处理以导出第一组频率分量，其中第一组低通滤波器串联布置在具有第一低通滤波器和最后低通滤波器的链中 滤波器，每个低通滤波器的输出被馈送到链中的下一个低通滤波器，直到最后一个低通滤波器。 最后一个低通滤波器的输出被下采样以产生下采样信号。 下采样信号用第二组低通滤波器处理以导出第二组频率分量。