公开(公告)号：US20230034119A1

公开(公告)日：2023-02-02

申请号：US17816177

申请日：2022-07-29

Applicant: STMICROELECTRONICS SA

Inventor： Eric Andre ,  Lionel Vogt

IPC: H04L27/10 ,  H04L27/12 ,  H04L27/16

Abstract: In an embodiment a device includes a first circuit and a second circuit, wherein the first circuit is configured to generate a fourth signal and a fifth signal by applying the phase shift respectively to a first signal and to a second signal and deliver a sixth signal corresponding to a sampling over one bit of the fourth signal, a seventh signal corresponding to a sampling over one bit of the fifth signal, an eighth signal corresponding to a sampling over one bit of a difference between the fourth and fifth signals, and a ninth signal corresponding to a sampling over one bit of a sum between the fourth and fifth signals, wherein the second circuit is configured to receive the sixth, seventh, eighth, and ninth signals and determine, during a first phase where the first and second signals are representative of a first known symbol of a QPSK constellation, a state of a first bit from among a first state and a second state based on the eighth and ninth signals.

公开(公告)号：US11112812B2

公开(公告)日：2021-09-07

申请号：US16438206

申请日：2019-06-11

Applicant: STMicroelectronics SA

Inventor： Lionel Vogt ,  Eoin Padraig O Hannaidh

IPC: G05F1/575 ,  G05F1/565

Abstract: A low-dropout voltage regulation device includes a power stage having an output terminal coupled to a load circuit, the load circuit being operable in a plurality of operating modes. The load circuit is configured to receive a different respective output current when in each of the plurality of operating modes. An error amplifier has an output coupled to an input terminal of the power stage. A compensation circuit is coupled to the input terminal of the power stage and is operable in a plurality of selectable configurations that are respectively tailored to the plurality of operating modes. The plurality of selectable configurations are selectable in response to a control signal representative of a current operating mode of the load circuit.

公开(公告)号：US10432154B2

公开(公告)日：2019-10-01

申请号：US15609639

申请日：2017-05-31

Applicant: STMicroelectronics SA

Inventor： Lionel Vogt

IPC: H03G3/10 ,  H03F3/42 ,  H03F1/02 ,  H03F1/30 ,  H03F3/189 ,  H03F3/193 ,  H03G3/30

Abstract: A radiofrequency (RF) amplifier includes an input terminal, an output terminal, and a power supply and biasing stage having an output coupled to the input terminal. An amplification stage of the RF amplifier includes a first transistor having a control terminal coupled to the input terminal and a first conduction terminal coupled to the output terminal. The power supply and biasing stage is configured to generate a bias voltage at the control terminal of the first transistor to simultaneously regulate a power supply voltage of the amplification stage to a first voltage and a bias current of the amplification stage to a first current.

公开(公告)号：US20160173036A1

公开(公告)日：2016-06-16

申请号：US14955969

申请日：2015-12-01

Applicant: STMicroelectronics SA

Inventor： Lionel Vogt ,  Baudouin Martineau ,  Aurelien Larie

IPC: H03F1/02 ,  H03F3/193 ,  H03F3/21

CPC classification number: H03F1/0205 ,  H03F1/0261 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F3/45179 ,  H03F2200/432 ,  H03F2200/451 ,  H03F2200/516 ,  H03F2203/21106 ,  H03F2203/45394

Abstract: An amplifier includes at least two amplification stages coupled in parallel. Each amplification stage includes at differential pair of amplifying MOS transistors having gates connected to a first and second input nodes common to amplifying stages, and bulk regions connected to each other but insulated from bulk regions of the amplifying MOS transistors of the other amplification stages. A configuration circuit generates bias voltage for application to the bulk terminals in each amplification stage to set the threshold voltages of the amplifying MOS transistors, and thus configuring the operating range of each amplification stage so that different amplification stages have different operating ranges.

Abstract translation: 放大器包括并联耦合的至少两个放大级。 每个放大级包括在具有连接到放大级共同的第一和第二输入节点的栅极的差分对放大MOS晶体管和彼此连接但与其它放大级的放大MOS晶体管的体区绝缘的体区域。 配置电路产生用于施加到每个放大级中的批量端子的偏压，以设置放大MOS晶体管的阈值电压，从而构成每个放大级的工作范围，使得不同的放大级具有不同的工作范围。