Electronic envelope detection circuit and corresponding demodulator

    公开(公告)号:US10951168B2

    公开(公告)日:2021-03-16

    申请号:US16739287

    申请日:2020-01-10

    发明人: Lionel Vogt

    摘要: An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

    Electronic envelope detection circuit and corresponding demodulator

    公开(公告)号:US11296654B2

    公开(公告)日:2022-04-05

    申请号:US17171490

    申请日:2021-02-09

    发明人: Lionel Vogt

    摘要: An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

    RADIO FREQUENCY DOUBLER AND TRIPLER
    5.
    发明公开

    公开(公告)号:US20240056063A1

    公开(公告)日:2024-02-15

    申请号:US18492597

    申请日:2023-10-23

    发明人: Lionel Vogt

    IPC分类号: H03K5/00

    CPC分类号: H03K5/00006

    摘要: In an embodiment a radiofrequency doubler includes a first transistor and a second transistor connected in parallel between a first differential output and a first terminal of a current source configured to provide a bias current, a second terminal of the current source being connected to a first supply potential, a third transistor connected between the first terminal of the current source and a second differential output, a circuit configured to apply an AC component of a first differential input and a first DC voltage to a gate of the first transistor, apply an AC component of a second differential input and the first DC voltage to a gate of the second transistor and apply a second DC voltage to a gate of the third transistor, and a feedback loop configured to control the first voltage or the second voltage from a difference between DC components of the first and second differential outputs so as to equalize the DC components.

    RADIO FREQUENCY DOUBLER AND TRIPLER

    公开(公告)号:US20230067052A1

    公开(公告)日:2023-03-02

    申请号:US17822375

    申请日:2022-08-25

    发明人: Lionel Vogt

    IPC分类号: H03K5/00

    摘要: In an embodiment a radiofrequency doubler includes a first transistor and a second transistor connected in parallel between a first differential output and a first terminal of a current source configured to provide a bias current, a second terminal of the current source being connected to a first supply potential, a third transistor connected between the first terminal of the current source and a second differential output, a circuit configured to apply an AC component of a first differential input and a first DC voltage to a gate of the first transistor, apply an AC component of a second differential input and the first DC voltage to a gate of the second transistor and apply a second DC voltage to a gate of the third transistor, and a feedback loop configured to control the first voltage or the second voltage from a difference between DC components of the first and second differential outputs so as to equalize the DC components.

    Radio frequency doubler and tripler

    公开(公告)号:US11838025B2

    公开(公告)日:2023-12-05

    申请号:US17822375

    申请日:2022-08-25

    发明人: Lionel Vogt

    IPC分类号: H03K5/00

    CPC分类号: H03K5/00006

    摘要: In an embodiment a radiofrequency doubler includes a first transistor and a second transistor connected in parallel between a first differential output and a first terminal of a current source configured to provide a bias current, a second terminal of the current source being connected to a first supply potential, a third transistor connected between the first terminal of the current source and a second differential output, a circuit configured to apply an AC component of a first differential input and a first DC voltage to a gate of the first transistor, apply an AC component of a second differential input and the first DC voltage to a gate of the second transistor and apply a second DC voltage to a gate of the third transistor, and a feedback loop configured to control the first voltage or the second voltage from a difference between DC components of the first and second differential outputs so as to equalize the DC components.

    Device for compensating a frequency shift

    公开(公告)号:US11757686B2

    公开(公告)日:2023-09-12

    申请号:US17816177

    申请日:2022-07-29

    摘要: In an embodiment a device includes a first circuit and a second circuit, wherein the first circuit is configured to generate a fourth signal and a fifth signal by applying the phase shift respectively to a first signal and to a second signal and deliver a sixth signal corresponding to a sampling over one bit of the fourth signal, a seventh signal corresponding to a sampling over one bit of the fifth signal, an eighth signal corresponding to a sampling over one bit of a difference between the fourth and fifth signals, and a ninth signal corresponding to a sampling over one bit of a sum between the fourth and fifth signals, wherein the second circuit is configured to receive the sixth, seventh, eighth, and ninth signals and determine, during a first phase where the first and second signals are representative of a first known symbol of a QPSK constellation, a state of a first bit from among a first state and a second state based on the eighth and ninth signals.