公开(公告)号：US11152326B2

公开(公告)日：2021-10-19

申请号：US16664568

申请日：2019-10-25

Applicant: STMicroelectronics, Inc.

Inventor： Rennier Rodriguez ,  Rammil Seguido ,  Raymond Albert Narvadez ,  Michael Tabiera

IPC: H01L23/00 ,  H01L23/495

Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.

公开(公告)号：US11004776B2

公开(公告)日：2021-05-11

申请号：US15912193

申请日：2018-03-05

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson Talledo ,  Rammil Seguido

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

Abstract: A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.

公开(公告)号：US20180197809A1

公开(公告)日：2018-07-12

申请号：US15912193

申请日：2018-03-05

Applicant: STMicroelectronics, Inc.

Inventor： Jefferson Talledo ,  Rammil Seguido

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49531 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4918 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.

公开(公告)号：US20180190576A1

公开(公告)日：2018-07-05

申请号：US15399234

申请日：2017-01-05

Applicant: STMicroelectronics, Inc.

Inventor： Rennier Rodriguez ,  Aiza Marie Agudon ,  Jefferson Talledo ,  Moonlord Manalo ,  Ela Mia Cadag ,  Rammil Seguido

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49513 ,  H01L23/49548 ,  H01L2224/27013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.