Abstract:
A display device includes: a substrate comprising an open portion; a pad portion on the substrate and exposed through the open portion; a fanout line integrally formed with the pad portion; a data line electrically connected to the fanout line; a flexible film under the substrate and comprising a lead electrode inserted into the open portion of the substrate to directly contact the pad portion; and a contact portion covering a lower surface of the lead electrode and a lower surface of the pad portion to electrically connect the lead electrode and the pad portion.
Abstract:
An electronic device includes a display device, which may be fabricated using a described method. The display device includes a glass substrate including a first surface, a second surface opposite the first surface, and a side surface between the first surface and the second surface, an outermost structure on the first surface of the glass substrate and located adjacent to an edge of one side of the glass substrate, and a display area including a plurality of light emitting areas on the first surface of the glass substrate and located farther from the edge of the one side of the glass substrate than the outermost structure is. A minimum distance from the side surface of the glass substrate to the outermost structure is equal to 130 μm or less.
Abstract:
A thin film transistor array panel and a manufacturing method capable of forming an insulating layer made of different materials for a portion contacting an oxide semiconductor and a second portion without an additional process. Source and drain electrodes of the thin film transistor each include a lower layer and an upper layer. A first passivation layer contacts the lower layer of the source and drain electrodes but does not contact the upper layer of the source and drain electrodes, and a second passivation layer is disposed on the upper layer of the source and drain electrodes. The first passivation layer may be made of silicon oxide, and the second passivation may be made of silicon nitride.
Abstract:
A display device includes a substrate including a main region and a pad area; a buffer layer on the main region of the substrate; a first electrode on the buffer layer; a first wiring protection layer on the substrate, the first wiring protection layer overlapping a bending area located between the main region and the pad area; a signal line on the first electrode and the first wiring protection layer; a display element layer on the signal line, the display element layer overlapping the main region; and a bending protection layer on the signal line, the bending protection layer overlapping the bending area, and the substrate includes a first substrate overlapping the main region, and a second substrate spaced apart from the first substrate with the bending area therebetween, and overlapping the pad area.
Abstract:
There is provided a display device including a second substrate corresponding to a main area, a pad area, and a bending area between the main area and the pad area, a first substrate at the main area and at the pad area and beneath the second substrate, and a display element layer at the main area and above the second substrate, wherein the first substrate includes a first sub-substrate overlapped with the main area, and including a first surface adjacent the second substrate, a second surface opposite to the first surface, and a first side directed toward the bending area, and a second sub-substrate spaced apart from the first sub-substrate and overlapped with the pad area, wherein a first inclined angle formed by the second surface and the first side is an obtuse angle.
Abstract:
A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
Abstract:
A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
Abstract:
A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.