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公开(公告)号:US11620927B2
公开(公告)日:2023-04-04
申请号:US17460779
申请日:2021-08-30
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Si Duk Sung , Dae Sik Lee , Sang Hyun Lee , Myeong Su Kim
IPC: G09G3/20
Abstract: A display device includes a scale factor provider, a grayscale converter, and pixels. The scale factor provider calculates an n-th scale factor based on n-th input grayscales received during an n-th frame period. The grayscale converter calculates (n+p)th output grayscales by applying the n-th scale factor to (n+p)th input grayscales received during an (n+p)th frame period in a first mode. The pixels output light to display an image based on the (n+p)th output grayscales, where n is an integer greater than 0 and p is an integer greater than 1.
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公开(公告)号:US11043156B2
公开(公告)日:2021-06-22
申请号:US16861926
申请日:2020-04-29
Applicant: Samsung Display Co., Ltd.
Inventor: Si Duk Sung , Sang Hyun Lee , Bo Yeon Kim
IPC: G09G3/20
Abstract: A display device includes a display panel, a power supply, a signal controller configured to generate first and second clock signals having a period, a clock signal generator configured to generate a gate clock signal that is raised to a high level voltage in synchronization with the first clock signal, and that falls to a low level voltage in synchronization with the second clock signal, generate a panel separation signal by comparing a voltage of the gate clock signal with a first reference voltage during a falling period during which the gate clock signal falls, and transfer the panel separation signal to the power supply or the signal controller, and a gate driver configured to sequentially apply a gate signal by using the gate clock signal, wherein the power supply or the signal controller is configured to stop outputting depending on the panel separation signal.
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公开(公告)号:US09991781B2
公开(公告)日:2018-06-05
申请号:US15132485
申请日:2016-04-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sang Hyun Lee , Moon Shik Kang
CPC classification number: H02M1/15 , H02M3/156 , H02M3/33507 , H02M2001/0009
Abstract: A power supply includes a direct current to direct current converter that includes at least one switching element and that converts an externally supplied input voltage to an output voltage and then supplies the output voltage to a load, a current sensor that detects a frequency of a load current by sensing the load current, and a switching controller that sets a switching frequency corresponding to the frequency of the load current and that controls an operation of the at least one switching element according to the set switching frequency.
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公开(公告)号:US12302695B2
公开(公告)日:2025-05-13
申请号:US17403416
申请日:2021-08-16
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Woong Sik Kim , Sang Hyun Lee , Dong Hwan Bae , Jin Su Byun
IPC: H01L51/52 , H01L27/32 , H10K50/80 , H10K50/842 , H10K50/844 , H10K50/858 , H10K50/86 , H10K59/12 , H10K59/122 , H10K59/38 , H10K59/40 , H10K59/80
Abstract: A display device includes an emissive layer between a plurality of first electrodes and a second electrode, an encapsulation layer on the second electrode, an a touch layer on the encapsulation layer. A plurality of refractive patterns are on the touch layer and overlap the emissive layer, and a refractive film covers refractive patterns. Each of the refractive patterns and the refractive film comprise an organic material, and the refractive index of the refractive film is less than the refractive index of each of the refractive patterns.
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公开(公告)号:US12080245B2
公开(公告)日:2024-09-03
申请号:US18158349
申请日:2023-01-23
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sang Hyun Lee , Si Duk Sung , Dae Sik Lee
IPC: G09G3/3266 , G09G3/3275 , G09G3/3233
CPC classification number: G09G3/3266 , G09G3/3275 , G09G3/3233 , G09G2310/0202 , G09G2310/0254 , G09G2310/0289 , G09G2310/08 , G09G2320/0257 , G09G2330/02
Abstract: A display device includes a display unit including gate lines and pixels electrically coupled to the gate lines; a timing controller configured to generate an on-clock signal, an off-clock signal, an enable signal, and a common signal; a clock generator configured to generate a plurality of clock signals having different phases based on the on-clock signal and the off-clock signal, when the enable signal has a first voltage level, wherein the clock generator is to insert a common pulse into each of the plurality of clock signals based on the common signal, when the enable signal has a second voltage level different from the first voltage level; and a gate driver configured to generate gate signals based on the plurality of clock signals, and to sequentially provide the gate signals to the gate lines.
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公开(公告)号:US11862094B2
公开(公告)日:2024-01-02
申请号:US17832179
申请日:2022-06-03
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Dae Sik Lee , Si Duk Sung , Sang Hyun Lee
IPC: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3275
CPC classification number: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G2310/08 , G09G2330/021 , G09G2330/12
Abstract: A power management driver and a display device having the power management driver are provided, including a first power supply configured to supply a first voltage to a first driving power terminal of a pixel through a power line during a sensing period, and supply a second voltage to the first driving power terminal of the pixel through the power line during a display period; a controller configured to control timing at which the first voltage is output and timing at which the second voltage is output during a transition period between the display period and the sensing period in response to a sensing control signal; and a fault detector configured to detect a fault in the power line based on a current flowing through an output terminal during the sensing period.
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公开(公告)号:US11844240B2
公开(公告)日:2023-12-12
申请号:US17073874
申请日:2020-10-19
Applicant: Samsung Display Co., LTD.
Inventor: Jin-Su Byun , Sang Hyun Lee , Sae Hee Han , Ji-Hyun Kim
IPC: H01L27/32 , H10K59/122 , H10K50/844 , H10K59/40 , H10K59/35 , H10K71/00 , H10K59/12
CPC classification number: H10K59/122 , H10K50/844 , H10K59/353 , H10K59/40 , H10K71/00 , H10K59/1201
Abstract: A display device includes a base substrate, a pixel defining layer disposed on the base substrate and including a first opening, a light emitting structure disposed in the first opening of the pixel defining layer, a thin film encapsulation layer disposed on the light emitting structure, a touch electrode disposed on the thin film encapsulation layer, an insulating pattern disposed on the touch electrode and including a second opening which overlaps the first opening, and a high refractive layer disposed on the insulating pattern, the high refractive layer including a plurality of grid patterns disposed on a top surface of the high refractive layer, and a refractive index higher than a refractive index of the insulating pattern.
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公开(公告)号:US20230260463A1
公开(公告)日:2023-08-17
申请号:US18141225
申请日:2023-04-28
Applicant: Samsung Display Co., Ltd.
Inventor: Bo Yeon KIM , Myeong Su Kim , Sang Hyun Lee
IPC: G09G3/3266 , G09G3/3233
CPC classification number: G09G3/3266 , G09G3/3233 , G09G2320/0233 , G09G2310/08 , G09G2310/0213 , G09G2310/0286
Abstract: A gate driver includes a first shift register connected to gate lines, and configured to supply a gate signal to the gate lines in response to a first start pulse, and a second shift register connected to the gate lines and sensing control lines, and configured to supply the gate signal and a sensing signal to the gate lines and the sensing control lines in response to a second start pulse, in which the second shift register is configured to supply the second start pulse at different times in sequential frames.
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公开(公告)号:US11501691B2
公开(公告)日:2022-11-15
申请号:US16917740
申请日:2020-06-30
Applicant: Samsung Display Co., Ltd.
Inventor: Si Duk Sung , Sang Hyun Lee , Myeong Su Kim
IPC: G09G3/20 , G09G3/3266 , G09G3/36 , G09G3/296
Abstract: A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.
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公开(公告)号:US11270641B1
公开(公告)日:2022-03-08
申请号:US17236481
申请日:2021-04-21
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Dae Sik Lee , Si Duk Sung , Sung Mo Yang , Sang Hyun Lee
IPC: G09G3/3233
Abstract: A display device includes a first power source, a timing controller, and pixels. The timing controller is connected to the first power source through a main line, an auxiliary line, and a detection line. The pixels are commonly connected to the first power source through a first power line. The first power source includes: a main power source connected to the first power line and the main line; an auxiliary power source connected to the auxiliary line; a rectifier connected between the auxiliary power source and the first power line; and a comparator comparing a voltage of the first power line and providing its output to the detection line.
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