SIMULATION METHOD AND SIMULATION DEVICE
    12.
    发明公开

    公开(公告)号:US20240143876A1

    公开(公告)日:2024-05-02

    申请号:US18462702

    申请日:2023-09-07

    CPC classification number: G06F30/27 G06N3/092 H03K19/20

    Abstract: A simulation method and a simulation device are disclosed. A simulation method according to the inventive concept is provided. A simulation method of the inventive concept may include obtaining an initial state variable and an initial reward variable detected from the semiconductor device, training an agent to output a first action variable of a reinforcement learning model based on the initial state variable and the initial reward variable; and generating a first state variable of the reinforcement learning model and generating a first reward variable, based on the first action variable, wherein the first reward variable includes a skew reward variable for rewarding a skew occurring in the semiconductor device and a duty reward variable for rewarding a duty error rate of an output signal output from the semiconductor device.

    SYSTEM AND METHOD FOR MODELING A SEMICONDUCTOR FABRICATION PROCESS

    公开(公告)号:US20220092239A1

    公开(公告)日:2022-03-24

    申请号:US17231428

    申请日:2021-04-15

    Abstract: A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.

    Memory controllers, memory systems including the same and memory modules

    公开(公告)号:US11068347B2

    公开(公告)日:2021-07-20

    申请号:US16878793

    申请日:2020-05-20

    Abstract: A memory controller configured to control a memory module including a plurality of memory devices which constitute a first channel and a second channel includes an error correction code (ECC) engine, and a control circuit configured to control the ECC engine. The ECC engine is configured to generate a codeword including a plurality of symbols by adaptively constructing, based on device information including mapping information, each of the plurality of symbols from a predetermined number of data bits received via a plurality of input/output pads of each of the plurality of memory devices, and transmit the codeword to the memory module. The mapping information indicates whether each of the plurality of input/output pads is mapped to the same symbol among the plurality of symbols or different symbols among the plurality of symbols. Each of the plurality of symbols corresponds to a unit of error correction of the ECC engine.

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