Abstract:
Disclosed is a method of operating a storage controller, the storage controller communicating with a host and a non-volatile memory device. The method includes receiving a first erase request from the host, the first erase request being for a first zone of a plurality of zones of the non-volatile memory device, loading first allocation list information of the first zone from an allocation list table based on the first erase request, deallocating memory blocks allocated to the first zone based on the first allocation list information, wherein sequential physical page numbers of the memory blocks are respectively mapped onto sequential logical page numbers, and providing the non-volatile memory device with a physical erase request for the deallocated memory blocks of the first zone.
Abstract:
In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.
Abstract:
Disclosed is a method of operating a storage controller, the storage controller communicating with a host and a non-volatile memory device. The method includes receiving a first erase request from the host, the first erase request being for a first zone of a plurality of zones of the non-volatile memory device, loading first allocation list information of the first zone from an allocation list table based on the first erase request, deallocating memory blocks allocated to the first zone based on the first allocation list information, wherein sequential physical page numbers of the memory blocks are respectively mapped onto sequential logical page numbers, and providing the non-volatile memory device with a physical erase request for the deallocated memory blocks of the first zone.
Abstract:
A device configured to compress a tensor including a plurality of cells includes: a quadtree generator configured to generate a quadtree searching for a non-zero cell included in the tensor and extract at least one parameter value from the quadtree; a mode selector configured to determine a compression mode based on the at least one parameter; and a bitstream generator configured to generate a bitstream by compressing the tensor based on the compression mode.
Abstract:
A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.
Abstract:
A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.
Abstract:
A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.