公开(公告)号：US11322119B2

公开(公告)日：2022-05-03

申请号：US16791856

申请日：2020-02-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Chul Yoon ,  Seong Woon Kim ,  Hyeong-Seok Kim ,  Kil Whan Lee

IPC: G09G5/36 ,  G09G5/395 ,  G09G5/393 ,  G06T1/20

Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

公开(公告)号：US09665980B2

公开(公告)日：2017-05-30

申请号：US14447883

申请日：2014-07-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hoon Kim ,  Yong Ha Park ,  Chang Hyo Yu ,  Kil Whan Lee

IPC: G06T15/30 ,  G06T17/20 ,  G06T17/30 ,  G06T15/10 ,  G06T15/00

CPC classification number: G06T17/30 ,  G06T15/005 ,  G06T15/10 ,  G06T17/20

Abstract: A method of operating a graphics processing unit includes determining, based on input data, whether to perform a tiling operation before or after a tessellation operation and performing the tiling operation according to the determination result. Performing the tiling operation after the tessellation operation if the input data is not a patch, and if a geometry of the patch is at the out-side of a convex hull defined by control points of the patch. Performing the tiling operation after the tessellation operation if a geometry of a tessellated primitive corresponding to the patch changes according to a shading operation.

公开(公告)号：US20150042650A1

公开(公告)日：2015-02-12

申请号：US14447883

申请日：2014-07-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hoon Kim ,  Yong Ha Park ,  Chang Hyo Yu ,  Kil Whan Lee

IPC: G06T15/08

CPC classification number: G06T17/30 ,  G06T15/005 ,  G06T15/10 ,  G06T17/20

Abstract: A method of operating a graphics processing unit includes determining, based on input data, whether to perform a tiling operation before or after a tessellation operation and performing the tiling operation according to the determination result. Performing the tiling operation after the tessellation operation if the input data is not a patch, and if a geometry of the patch is at the out-side of a convex hull defined by control points of the patch. Performing the tiling operation after the tessellation operation if a geometry of a tessellated primitive corresponding to the patch changes according to a shading operation.

Abstract translation: 操作图形处理单元的方法包括：基于输入数据确定是否在细分操作之前或之后执行拼贴操作，并根据确定结果进行拼贴操作。 如果输入数据不是补丁，则在细分操作之后执行平铺操作，并且如果补丁的几何形状位于由补丁的控制点定义的凸包的外侧。 如果与补丁相对应的镶嵌图元的几何形状根据着色操作而变化，则在细分操作之后执行平铺操作。

公开(公告)号：US08799585B2

公开(公告)日：2014-08-05

申请号：US13893746

申请日：2013-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil Whan Lee ,  Young Jin Chung

IPC: G06F13/00

CPC classification number: G06F12/0815 ,  G06F12/0804 ,  G06F12/0879

Abstract: A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.

Abstract translation: 高速缓冲存储器包括回写确定单元和突发长度确定单元。 回写确定单元基于块的n位脏值来确定块是否是回写块。 当块是回写块时，突发长度确定单元基于n位脏值和最小突发长度来确定包含在写回块中的回写数据的突发长度。