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    Air cleaning system and method for controlling the same
    11.
    发明授权
    Air cleaning system and method for controlling the same 有权

    公开(公告)号：US11141688B2

    公开(公告)日：2021-10-12

    申请号：US16171788

    申请日：2018-10-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae Hun Hur ,  Jae Kwon Ko ,  Han Taek Kwak ,  Min Gyu Kim

    IPC: B01D46/44 ,  F24F8/10 ,  B01D46/00 ,  F24F11/38 ,  F24F110/50

    Abstract: An air cleaning system having at least one dust sensor and a method for controlling the air cleaning system may improve accuracy of dust sensors through linkage control of the dust sensors, and may normally operate a faulty air cleaner using dust sensors of the remaining communicating air cleaners other than the faulty air cleaner even when any one of the dust sensors fails to operate. The air cleaning system may select a master dust sensor through linkage control of the dust sensors, and may operate the plurality of air cleaners only using sensor information of the master dust sensor. Therefore, the air cleaning system may stop operation of the remaining dust sensors other than the master dust sensor, may reduce measurement noise produced by the dust sensors and power consumption, and may increase a lifetime of the dust sensors.

    Vertical field effect transistor (VFET) structure with dielectric protection layer and method of manufacturing the same
    14.
    发明授权
    Vertical field effect transistor (VFET) structure with dielectric protection layer and method of manufacturing the same 有权

    公开(公告)号：US11538924B2

    公开(公告)日：2022-12-27

    申请号：US17026453

    申请日：2020-09-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hwi Chan Jun ,  Min Gyu Kim ,  Gil-Hwan Son

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/285

    Abstract: A vertical field effect transistor (VFET) device and a method of manufacturing the same are provided. The method includes: (a) providing an intermediate VFET structure comprising a substrate, and fin structures, gate structures and bottom epitaxial layers on the substrate, the gate structures being formed on the fin structures, respectively, each fin structure comprising a fin and a mask thereon, and the bottom epitaxial layers; (b) filling interlayer dielectric (ILD) layers between and at sides of the gate structures; (c) forming an ILD protection layer on the ILD layers, respectively, the ILD protection layer having upper portions and lower portions, and comprising a material preventing oxide loss at the ILD layers; (d) removing the fin structures, the gate structures and the ILD protection layer above the lower portion of the ILD protection layer; (e) removing the masks of the fin structures and top portions of the gate structures so that top surfaces of the fin structures and top surfaces of the gate structures after the removing are lower than top surfaces of the ILD layers; (f) forming top spacers on the gate structures of which the top portions are removed, and top epitaxial layers on the fin structures of which the masks are removed; and (g) forming a contact structure connected to the top epitaxial layers.

    VERTICAL FIELD-EFFECT TRANSISTOR DEVICES AND METHODS OF FORMING THE SAME
    15.
    发明申请
    VERTICAL FIELD-EFFECT TRANSISTOR DEVICES AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20220165623A1

    公开(公告)日：2022-05-26

    申请号：US17669452

    申请日：2022-02-11

    Applicant: Samsung Electronics Co., Ltd

    Inventor： Hwi Chan Jun ,  Min Gyu Kim

    IPC: H01L21/8234

    Abstract: Vertical field-effect transistor (VFET) devices and methods of forming the same are provided. The methods may include forming a lower structure on a substrate. The lower structure may include first and second VFETs, a preliminary isolation structure between the first and second VFETs, and a gate liner on opposing sides of the preliminary isolation structure and between the preliminary isolation structure and the substrate. Each of the first and second VFETs may include a bottom source/drain region, a channel region and a top source/drain region sequentially stacked, and a gate structure on a side surface of the channel region. The preliminary isolation structure may include a sacrificial layer and a gap capping layer sequentially stacked. The methods may also include forming a top capping layer on the lower structure and then forming a cavity between the first and second VFETs by removing the sacrificial layer.

    Air conditioner controlling system and air conditioner controlling method
    16.
    发明授权
    Air conditioner controlling system and air conditioner controlling method 有权

    公开(公告)号：US11060749B2

    公开(公告)日：2021-07-13

    申请号：US16063676

    申请日：2016-12-07

    Applicant: Samsung Electronics Co., Ltd

    Inventor： Jae Hun Hur ,  Min Gyu Kim ,  Chang-Yong Lee

    IPC: F24F11/54 ,  F24F11/64 ,  F24F11/30 ,  F24F11/89 ,  F24F11/56

    Abstract: The present disclosure relates to an air conditioner, an air conditioner controlling system, and an air conditioner controlling method. The air conditioner controlling system includes one or more controlled air conditioners, a main controlling air conditioner having control authority over, from among the one or more controlled air conditioners, one or more controlled air conditioners that belong to an upper rank group corresponding to the main controlling air conditioner, and a sub-controlling air conditioner having control authority over, from among the one or more controlled air conditioners, one or more controlled air conditioners that belong to a first lower rank group.

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