公开(公告)号：US20210022247A1

公开(公告)日：2021-01-21

申请号：US16868941

申请日：2020-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon HA ,  Subyung KANG ,  Sanghoon PARK ,  Soohyun SEO ,  Yongjin WOO ,  Yeomoon YOON

IPC: H05K1/14 ,  H01L23/40

Abstract: An electronic device is provided. The electronic device includes a housing, a first printed circuit board disposed in an internal space of the housing and including first conductive terminals, and a second printed circuit board disposed parallel to the first printed circuit board in the internal space and including second conductive terminals electrically connected to the first conductive terminals. The second printed circuit board includes at least some conductive terminals of the second conductive terminals, or at least one connection failure prevention structure disposed around at least some conductive terminals of the second conductive terminals.

公开(公告)号：US20240357741A1

公开(公告)日：2024-10-24

申请号：US18640555

申请日：2024-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeonkyung CHUNG ,  Jinyong PARK ,  Chulwoo PARK ,  Yongjae SONG ,  Sangwon HA

IPC: H05K1/03

CPC classification number: H05K1/036 ,  H05K2201/0191 ,  H05K2201/0209

Abstract: An electronic device according to an embodiment of the disclosure may comprise: a housing and a printed circuit board disposed in the housing and comprising an alternately stacked plurality of insulation layers and plurality of conductive layers. The plurality of insulation layers may include at least one first insulation layer and at least one second insulation layer. The at least one first insulation layer may include a first insulator including a resin having a Tg value of 200 degrees or more and a filler having a content of 50% to 70%. The at least one second insulation layer may include a second insulator including a glass fiber.

公开(公告)号：US20230121285A1

公开(公告)日：2023-04-20

申请号：US17968308

申请日：2022-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon HA ,  Hyunmo YANG ,  Yeonkyung CHUNG ,  Younoh CHI

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/06 ,  H05K3/24 ,  H05K3/42

Abstract: A printed circuit board and/or an electronic device including the same are provided. The printed circuit board and/or an electronic device includes at least one insulation layer including a first rigid region and a flexible region extending from the first rigid region, at least one first circuit pattern disposed on one surface of the at least one insulation layer to at least partially transverse the flexible region from the first rigid region, and at least one conductive pad formed at least partially on a surface of the first circuit pattern in the first rigid region, wherein the flexible region may be configured to flexibly deform more than the first rigid region.

公开(公告)号：US20220256705A1

公开(公告)日：2022-08-11

申请号：US17728363

申请日：2022-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon HA ,  Seyoung JANG ,  Sungjin KIM ,  Sanghoon PARK ,  Kyungho LEE ,  Younoh CHI

IPC: H05K1/14 ,  H01L25/065

Abstract: An electronic device is provided that includes a first circuit board including a first electronic component and a second electronic component disposed on a side of the first circuit board, a second circuit board spaced apart from the first circuit board and having a side facing the side of the first circuit board on which the first electronic component and the second electronic component are disposed, a first interposer disposed between the first circuit board and the second circuit board to form an inner space between the first circuit board and the second circuit board, and a second interposer disposed between the first circuit board and the second circuit board to divide the inner space into a first region and a second region, and wherein the first interposer and the second interposer electrically connect the first circuit board to the second circuit board.

公开(公告)号：US20210406646A1

公开(公告)日：2021-12-30

申请号：US17091338

申请日：2020-11-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Songyi HAN ,  Sangwon HA ,  Donghyuk KWON

IPC: G06N3/06 ,  G06N3/08 ,  G06K9/62 ,  G06F9/38

Abstract: A processor-implemented tensor processing method includes: receiving a request to process a neural network including a normalization layer by an accelerator; and generating an instruction executable by the accelerator in response to the request, wherein, by executing the instruction, the accelerator is configured to determine an intermediate tensor corresponding to a result of a portion of operations of the normalization layer, by performing, in a channel axis direction, a convolution based on an input tensor and a kernel, wherein the input tensor is of the normalization layer and includes a plurality of channels, a number of input channels of the kernel is determined based on the input tensor, and scaling values of elements of the kernel are determined based on the number of input channels.

公开(公告)号：US20200006853A1

公开(公告)日：2020-01-02

申请号：US16460937

申请日：2019-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungwon PARK ,  Dongil SON ,  Sangwon HA

IPC: H01Q9/04 ,  H05K1/02 ,  H05K1/11

Abstract: An electronic device includes a communication circuit electrically connected with a circuit board. The circuit board includes a first portion comprising a first layered structure in which a wiring layer and a first insulating layer are alternately positioned, and a second portion comprising a second layered structure in which the wiring layer and the first insulating layer are alternately positioned and a second insulating layer. At least one antenna patch is positioned on or within the second insulating layer. A conductive line penetrates the second layered structure and the second insulating layer and electrically connects the at least one antenna patch and the communication circuit. The first insulating layer has a first loss tangent value, and the second insulating layer has a second loss tangent value smaller than the first loss tangent value.

公开(公告)号：US20190042948A1

公开(公告)日：2019-02-07

申请号：US16051788

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhaeng LEE ,  Seungwon LEE ,  Sangwon HA ,  Wonjo LEE

IPC: G06N3/10 ,  G06N3/04 ,  G06F7/544

Abstract: A method of generating a fixed-point quantized neural network includes analyzing a statistical distribution for each channel of floating-point parameter values of feature maps and a kernel for each channel from data of a pre-trained floating-point neural network, determining a fixed-point expression of each of the parameters for each channel statistically covering a distribution range of the floating-point parameter values based on the statistical distribution for each channel, determining fractional lengths of a bias and a weight for each channel among the parameters of the fixed-point expression for each channel based on a result of performing a convolution operation, and generating a fixed-point quantized neural network in which the bias and the weight for each channel have the determined fractional lengths.