公开(公告)号：US09985141B2

公开(公告)日：2018-05-29

申请号：US15666844

申请日：2017-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho Lee ,  Ho Jun Kim ,  Sung Dae Suk ,  Geum Jong Bae

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/78696 ,  H01L29/0665 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66545

Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.

公开(公告)号：US09871103B2

公开(公告)日：2018-01-16

申请号：US15086775

申请日：2016-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho Jun Kim ,  Sung Dae Suk

IPC: H01L29/06 ,  H01L27/02 ,  H01L27/118 ,  H01L27/092 ,  H01L23/528 ,  H01L27/11 ,  H01L27/088

CPC classification number: H01L29/0673 ,  H01L23/5286 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/11807 ,  H01L29/42392 ,  H01L29/775 ,  H01L2027/11874

Abstract: A semiconductor device includes a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions, a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions, a plurality of conductive lines electrically connected to at least one of the source/drain regions and the plurality of gate electrodes through a plurality of vias, and a power line disposed between the semiconductor substrate and the plurality of conductive lines and configured to supply a power supply voltage.

公开(公告)号：US09679965B1

公开(公告)日：2017-06-13

申请号：US14961213

申请日：2015-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Dae Suk ,  Bom-Soo Kim ,  Kang-Ill Seo

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/51 ,  H01L29/417 ,  H01L27/12

CPC classification number: H01L29/0673 ,  H01L27/1211 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/511 ,  H01L29/66439 ,  H01L29/785

Abstract: A semiconductor device includes a wire pattern spaced apart from a substrate and extended in a first direction, a gate electrode disposed around a circumference of the wire pattern and extended in a second direction that is different from the first direction, a source disposed on a first side of the gate electrode, a drain disposed on a second side of the gate electrode, the source and the drain connected to the wire pattern and a gate spacer disposed on first and second sidewalls of the gate electrode, on the source and on the drain.

公开(公告)号：US20170033102A1

公开(公告)日：2017-02-02

申请号：US15086775

申请日：2016-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho Jun Kim ,  Sung Dae Suk

IPC: H01L27/088 ,  H01L23/522 ,  H01L29/06 ,  H01L27/11 ,  H01L27/118 ,  H01L23/528 ,  H01L27/02

CPC classification number: H01L29/0673 ,  H01L23/5286 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/11807 ,  H01L29/42392 ,  H01L29/775 ,  H01L2027/11874

Abstract: A semiconductor device includes a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions, a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions, a plurality of conductive lines electrically connected to at least one of the source/drain regions and the plurality of gate electrodes through a plurality of vias, and a power line disposed between the semiconductor substrate and the plurality of conductive lines and configured to supply a power supply voltage.

Abstract translation: 半导体器件包括多个有源区，包括在半导体衬底上沿第一方向延伸的沟道区和连接到沟道区的源极/漏极区，多个栅电极沿与第一方向不同的第二方向延伸以与 沟道区域，通过多个通孔电连接到所述源极/漏极区域和所述多个栅极电极中的至少一个的多个导电线以及设置在所述半导体衬底和所述多条导电线之间的电力线，并且被配置为 提供电源电压。