公开(公告)号：US09177942B2

公开(公告)日：2015-11-03

申请号：US14463650

申请日：2014-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonkeun Kim ,  In-Young Lee ,  Chang-Seong Jeon ,  Taeje Cho

IPC: H01L23/34 ,  H01L25/10 ,  H01L25/00 ,  H01L23/36 ,  H01L23/367 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/345 ,  H01L23/36 ,  H01L23/3677 ,  H01L24/19 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/181 ,  H01L2924/00

Abstract: Provided are semiconductor packages and methods of fabricating the same. The method may include mounting a first semiconductor chip including chip and heat-transfer regions and a lower heat-transfer pattern disposed on the heat-transfer region, on a substrate, mounting a second semiconductor chip on the chip region of the first semiconductor chip, forming a mold layer on the substrate to enclose the first and second semiconductor chips, forming an opening in the mold layer to expose at least a portion of the lower heat-transfer pattern, forming a heat-pathway pattern in the opening, and forming a heat-dissipating part on the second semiconductor chip and the mold layer to be connected to the heat-pathway pattern.

Abstract translation: 提供半导体封装及其制造方法。 该方法可以包括在基板上安装包括芯片和传热区域的第一半导体芯片和设置在传热区域上的较低传热图案，将第二半导体芯片安装在第一半导体芯片的芯片区域上， 在所述基板上形成模具层以包围所述第一和第二半导体芯片，在所述模具层中形成开口以露出所述下部传热图案的至少一部分，以在所述开口中形成热通路图案，并且形成 第二半导体芯片上的散热部件和要连接到热通路图案的模具层。