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11.
公开(公告)号:US12021032B2
公开(公告)日:2024-06-25
申请号:US18326325
申请日:2023-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yanggyoo Jung , Jinhyun Kang , Sungeun Kim , Sangmin Yong , Seungkwan Ryu
IPC: H01L23/538 , H01L23/00 , H01L23/498 , H01L25/065
CPC classification number: H01L23/5383 , H01L23/49816 , H01L24/16 , H01L24/73 , H01L25/0655 , H01L24/32 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/1517
Abstract: A semiconductor package includes a package substrate. An interposer is disposed on the package substrate. The interposer includes a semiconductor substrate, a wiring layer disposed on an upper surface of the semiconductor substrate and having a plurality of wirings therein, redistribution wiring pads disposed on the wiring layer and electrically connected to the wirings, bonding pads disposed on the redistribution wiring pads, and an insulation layer pattern disposed on the wiring layer and exposing at least a portion of the bonding pad, and first and second semiconductor devices disposed on the interposer. The first and second semiconductor devices are spaced apart from each other and are electrically connected to each other by at least one of the wirings.
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公开(公告)号:US20240079349A1
公开(公告)日:2024-03-07
申请号:US18334578
申请日:2023-06-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yanggyoo Jung , Younglyong Kim , Seungbin Baek
IPC: H01L23/00 , H01L23/053 , H01L23/36 , H01L23/538 , H01L25/065 , H01L25/16
CPC classification number: H01L23/562 , H01L23/053 , H01L23/36 , H01L23/5385 , H01L24/32 , H01L25/0655 , H01L25/16 , H01L24/16 , H01L24/73 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204
Abstract: A semiconductor package is provided to include a package substrate, a plurality of semiconductor chips mounted on the package substrate, an interposer arranged between the package substrate and the plurality of semiconductor chips, a plurality of passive elements mounted on the package substrate and spaced apart from the interposer, a first stiffener positioned on the package substrate and including a first hole accommodating the interposer and a second hole accommodating the plurality of passive elements, and a second stiffener positioned on the first stiffener and including a third hole communicating with the first hole. The first stiffener has a first coefficient of thermal expansion, and the second stiffener has a second coefficient of thermal expansion different from the first coefficient of thermal expansion.
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公开(公告)号:US20240063129A1
公开(公告)日:2024-02-22
申请号:US18299927
申请日:2023-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seok Geun Ahn , Seokhyun Lee , Yanggyoo Jung , Hwanyoung Choi
IPC: H01L23/538 , H01L23/498 , H01L23/00 , H01L23/31 , H10B80/00
CPC classification number: H01L23/5383 , H01L23/5385 , H01L23/49816 , H01L24/16 , H01L23/3157 , H01L23/5384 , H10B80/00 , H01L2224/16227
Abstract: A semiconductor package includes a package substrate, an interposer substrate on the package substrate, first connection bumps between the package substrate and the interposer substrate, first and second semiconductor chips on the interposer substrate, second connection bumps between the interposer substrate and the first and second semiconductor chips, and an upper molding layer on the interposer substrate and at least partially surrounding the first semiconductor chip and the second semiconductor chip. The interposer substrate includes a plurality of sub-interposers horizontally spaced apart from each other and each including through electrodes, a lower molding layer in a space between the sub-interposers, and a redistribution layer electrically connected to the through electrodes on the sub-interposers and the lower molding layer. A sum of areas of the sub-interposers is less than a sum of areas of the first and second semiconductor chips.
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14.
公开(公告)号:US11694961B2
公开(公告)日:2023-07-04
申请号:US17208512
申请日:2021-03-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yanggyoo Jung , Jinhyun Kang , Sungeun Kim , Sangmin Yong , Seungkwan Ryu
IPC: H01L23/538 , H01L23/498 , H01L25/065 , H01L23/00
CPC classification number: H01L23/5383 , H01L23/49816 , H01L24/16 , H01L24/73 , H01L25/0655 , H01L24/32 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/1517
Abstract: A semiconductor package includes a package substrate. An interposer is disposed on the package substrate. The interposer in a semiconductor substrate, a wiring layer disposed on an upper surface of the semiconductor substrate and having a plurality of wirings therein, redistribution wiring pads disposed on the wiring layer and electrically connected to the wirings, bonding pads disposed on the redistribution wiring pads, and an insulation layer pattern disposed on the wiring layer and exposing at least a portion of the bonding pad, and first and second semiconductor devices disposed on the interposer. The first and second semiconductor devices are spaced apart from each other and are electrically connected to each other by at least one of the wirings.
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15.
公开(公告)号:US20210391265A1
公开(公告)日:2021-12-16
申请号:US17208512
申请日:2021-03-22
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor: Yanggyoo Jung , Jinhyun Kang , Sungeun Kim , Sangmin Yong , Seungkwan Ryu
IPC: H01L23/538 , H01L23/498 , H01L25/065 , H01L23/00
Abstract: A semiconductor package includes a package substrate. An interposer is disposed on the package substrate. The interposer in a semiconductor substrate, a wiring layer disposed on an upper surface of the semiconductor substrate and having a plurality of wirings therein, redistribution wiring pads disposed on the wiring layer and electrically connected to the wirings, bonding pads disposed on the redistribution wiring pads, and an insulation layer pattern disposed on the wiring layer and exposing at least a portion of the bonding pad, and first and second semiconductor devices disposed on the interposer. The first and second semiconductor devices are spaced apart from each other and are electrically connected to each other by at least one of the wirings.
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